Displaying 4 results from an estimated 4 matches for "10134,6".
Did you mean:
1013,6
2019 Aug 09
0
[RFC PATCH v6 64/92] kvm: introspection: add single-stepping
...nding_event(struct kvm_vcpu *vcpu, bool req_int_win)
{
int r;
+ if (kvmi_vcpu_enabled_ss(vcpu))
+ /*
+ * We cannot inject events during single-stepping.
+ * Try again later.
+ */
+ return -1;
+
/* try to reinject previous events if any */
if (vcpu->arch.exception.injected)
@@ -10134,6 +10141,18 @@ void kvm_control_cr3_write_exiting(struct kvm_vcpu *vcpu, bool enable)
}
EXPORT_SYMBOL(kvm_control_cr3_write_exiting);
+void kvm_set_mtf(struct kvm_vcpu *vcpu, bool enable)
+{
+ kvm_x86_ops->set_mtf(vcpu, enable);
+}
+EXPORT_SYMBOL(kvm_set_mtf);
+
+void kvm_set_interrupt_shado...
2019 Aug 12
1
[RFC PATCH v6 64/92] kvm: introspection: add single-stepping
...t r;
>
> + if (kvmi_vcpu_enabled_ss(vcpu))
> + /*
> + * We cannot inject events during single-stepping.
> + * Try again later.
> + */
> + return -1;
> +
> /* try to reinject previous events if any */
>
> if (vcpu->arch.exception.injected)
> @@ -10134,6 +10141,18 @@ void kvm_control_cr3_write_exiting(struct kvm_vcpu *vcpu, bool enable)
> }
> EXPORT_SYMBOL(kvm_control_cr3_write_exiting);
>
> +void kvm_set_mtf(struct kvm_vcpu *vcpu, bool enable)
> +{
> + kvm_x86_ops->set_mtf(vcpu, enable);
> +}
> +EXPORT_SYMBOL(kvm_s...
2019 Aug 09
117
[RFC PATCH v6 00/92] VM introspection
The KVM introspection subsystem provides a facility for applications running
on the host or in a separate VM, to control the execution of other VM-s
(pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.),
alter the page access bits in the shadow page tables (only for the hardware
backed ones, eg. Intel's EPT) and receive notifications when events of
interest have taken place
2019 Aug 09
117
[RFC PATCH v6 00/92] VM introspection
The KVM introspection subsystem provides a facility for applications running
on the host or in a separate VM, to control the execution of other VM-s
(pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.),
alter the page access bits in the shadow page tables (only for the hardware
backed ones, eg. Intel's EPT) and receive notifications when events of
interest have taken place