Displaying 5 results from an estimated 5 matches for "100c18".
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10018
2014 Oct 03
1
[PATCH v2 1/2] drm/nouveau/fb/nv50: Add PFB writes
(This is a v2 of patch "drm/nouveau/disp/nv50: Add PFB writes")
This fix a GPU lockup on 9400M (NVAC) when using acceleration, see
https://bugs.freedesktop.org/show_bug.cgi?id=27501
v2:
- Move code to subdev/fb/nv50.c as suggested by Roy Spliet;
- Remove arbitrary writes to 100c18/100c24 as suggested by Roy Spliet;
- Replace write to 100c1c of arbitrary value by the address of a scratch page
as proposed by Ilia Mirkin;
- Remove enabling of bits 16 and 0 as they don't yield in any changes.
Signed-off-by: Pierre Moreau <pierre.morrow at free.fr>
---
drivers/gpu/d...
2014 Dec 10
2
[PATCH RESEND 1/2] Allow noaccel to be a pci address
Signed-off-by: Pierre Moreau <pierre.morrow at free.fr>
---
drm/nouveau_drm.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drm/nouveau_drm.c b/drm/nouveau_drm.c
index afb93bb..ffa1e4f 100644
--- a/drm/nouveau_drm.c
+++ b/drm/nouveau_drm.c
@@ -61,9 +61,10 @@ MODULE_PARM_DESC(debug, "debug string to pass to driver core");
static char
2014 Dec 10
0
[PATCH v3 2/2] fb/nvaa: Enable non-isometric poller on NVAA/NVAC
(This is a v3 of patch "drm/nouveau/fb/nv50: Add PFB writes")
This fix a GPU lockup on 9400M (NVAC) when using acceleration, see
https://bugs.freedesktop.org/show_bug.cgi?id=27501
v2:
- Move code to subdev/fb/nv50.c as suggested by Roy Spliet;
- Remove arbitrary writes to 100c18/100c24
- Replace write to 100c1c of arbitrary value by the address of a scratch page
as proposed by Ilia Mirkin;
- Remove enabling of bits 16 and 0 as they don't yield in any changes.
v3:
- Move code to subdev/fb/nvaa.c as suggested by Ilia Mirkin.
The following changes were made thanks to i...
2014 Dec 11
1
[PATCH v3 2/2] fb/nvaa: Enable non-isometric poller on NVAA/NVAC
...atch "drm/nouveau/fb/nv50: Add PFB writes")
>
> This fix a GPU lockup on 9400M (NVAC) when using acceleration, see
> https://bugs.freedesktop.org/show_bug.cgi?id=27501
>
> v2:
> - Move code to subdev/fb/nv50.c as suggested by Roy Spliet;
> - Remove arbitrary writes to 100c18/100c24
> - Replace write to 100c1c of arbitrary value by the address of a scratch page
> as proposed by Ilia Mirkin;
> - Remove enabling of bits 16 and 0 as they don't yield in any changes.
>
> v3:
> - Move code to subdev/fb/nvaa.c as suggested by Ilia Mirkin.
> The follo...
2014 Dec 01
1
Questions about some PFB registers on NVAC cards
...heir associated
+ * read address, only for MCP77/78 and MCP79/7A. (fd#25701)
+ */
+ if ((nv_device(priv)->chipset == 0xaa || nv_device(priv)->chipset == 0xac)
+ && !nv_rd32(priv, 0x100c14)) {
+ nv_wr32(priv, 0x100c18, priv->r100c08 >> 8);
+ nv_mask(priv, 0x100c14, 0x00000000, 0x00000001);
+ nv_wr32(priv, 0x100c1c, priv->r100c08 >> 8);
+ nv_mask(priv, 0x100c14, 0x00000000, 0x00000002);
+ nv_wr32(priv, 0x100c24, priv->r10...