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008341
2010 Jan 25
2
[LLVMdev] question on instruction selection
Hi,
I was wondering how exactly instruction selection works in LLVM. As I'm not
aware of any document describing it, I'll ask here :)
So, the tablegen files that each backend implements describe the mapping
between selection DAG nodes and assembly instructions (and optionally? their
binary encoding). The selection DAG (one per basic block) is produced "by
hand" directly