Displaying 10 results from an estimated 10 matches for "1004k".
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2018 Nov 02
2
[PATCH 0/1] vhost: add vhost_blk driver
...G
>
> 1 171k 151k 148k 151k 195k 187k 175k
> 2 328k 302k 249k 241k 349k 334k 296k
> 3 479k 437k 179k 174k 501k 464k 404k
> 4 622k 568k 143k 183k 620k 580k 492k
> 5 755k 697k 136k 128k 737k 693k 579k
> 6 887k 808k 131k 120k 830k 782k 640k
> 7 1004k 926k 126k 131k 926k 863k 693k
> 8 1099k 1015k 117k 115k 1001k 931k 712k
> 9 1194k 1119k 115k 111k 1055k 991k 711k
> 10 1278k 1207k 109k 114k 1130k 1046k 695k
> 11 1345k 1280k 110k 108k 1119k 1091k 663k
> 12 1411k 1356k 104k 106k 1201k 1142k 629k
> 13 1466k 1423k 106k 106k 1...
2018 Nov 05
2
[PATCH 0/1] vhost: add vhost_blk driver
...G
>
> 1 171k 151k 148k 151k 195k 187k 175k
> 2 328k 302k 249k 241k 349k 334k 296k
> 3 479k 437k 179k 174k 501k 464k 404k
> 4 622k 568k 143k 183k 620k 580k 492k
> 5 755k 697k 136k 128k 737k 693k 579k
> 6 887k 808k 131k 120k 830k 782k 640k
> 7 1004k 926k 126k 131k 926k 863k 693k
> 8 1099k 1015k 117k 115k 1001k 931k 712k
> 9 1194k 1119k 115k 111k 1055k 991k 711k
> 10 1278k 1207k 109k 114k 1130k 1046k 695k
> 11 1345k 1280k 110k 108k 1119k 1091k 663k
> 12 1411k 1356k 104k 106k 1201k 1142k 629k
> 13 1466k 1423k 106k 106k 1...
2018 Nov 05
2
[PATCH 0/1] vhost: add vhost_blk driver
...G
>
> 1 171k 151k 148k 151k 195k 187k 175k
> 2 328k 302k 249k 241k 349k 334k 296k
> 3 479k 437k 179k 174k 501k 464k 404k
> 4 622k 568k 143k 183k 620k 580k 492k
> 5 755k 697k 136k 128k 737k 693k 579k
> 6 887k 808k 131k 120k 830k 782k 640k
> 7 1004k 926k 126k 131k 926k 863k 693k
> 8 1099k 1015k 117k 115k 1001k 931k 712k
> 9 1194k 1119k 115k 111k 1055k 991k 711k
> 10 1278k 1207k 109k 114k 1130k 1046k 695k
> 11 1345k 1280k 110k 108k 1119k 1091k 663k
> 12 1411k 1356k 104k 106k 1201k 1142k 629k
> 13 1466k 1423k 106k 106k 1...
2016 Jan 13
3
[v3,11/41] mips: reuse asm-generic/barrier.h
...ying that this is also forbidden?
> Imagine that P0 and P1 are two threads that share a store buffer. What
> then?
OK, I collected answers and it is:
In MIPS R6 this test passes OK, I mean - P2: Rx = 1 if Ry is read
as 1. By design.
However, it is unclear that happens in MIPS R2 1004K.
Moreover, there are voices against guarantee that it will be in
future and that voices point me to Documentation/memory-barriers.txt
section "DATA DEPENDENCY BARRIERS" examples which require SYNC_RMB
between loading address/index and using that for loading data based on
that ad...
2016 Jan 13
3
[v3,11/41] mips: reuse asm-generic/barrier.h
...ying that this is also forbidden?
> Imagine that P0 and P1 are two threads that share a store buffer. What
> then?
OK, I collected answers and it is:
In MIPS R6 this test passes OK, I mean - P2: Rx = 1 if Ry is read
as 1. By design.
However, it is unclear that happens in MIPS R2 1004K.
Moreover, there are voices against guarantee that it will be in
future and that voices point me to Documentation/memory-barriers.txt
section "DATA DEPENDENCY BARRIERS" examples which require SYNC_RMB
between loading address/index and using that for loading data based on
that ad...
2018 Nov 05
0
[PATCH 0/1] vhost: parallel virtqueue handling
...her stuffs to control the number of threads I
believe.
Thanks
>
> # num-queues
> # bare metal
> # virtio-blk
> # vhost-blk
>
> 1 171k 148k 195k
> 2 328k 249k 349k
> 3 479k 179k 501k
> 4 622k 143k 620k
> 5 755k 136k 737k
> 6 887k 131k 830k
> 7 1004k 126k 926k
> 8 1099k 117k 1001k
> 9 1194k 115k 1055k
> 10 1278k 109k 1130k
> 11 1345k 110k 1119k
> 12 1411k 104k 1201k
> 13 1466k 106k 1260k
> 14 1517k 103k 1296k
> 15 1552k 102k 1322k
> 16 1480k 101k 1346k
>
> Vitaly Mayatskikh (1):
> vhost: add per-vq worke...
2016 Jan 14
0
[v3,11/41] mips: reuse asm-generic/barrier.h
...gt;Imagine that P0 and P1 are two threads that share a store buffer. What
> >then?
>
> OK, I collected answers and it is:
>
> In MIPS R6 this test passes OK, I mean - P2: Rx = 1 if Ry is read as 1.
> By design.
>
> However, it is unclear that happens in MIPS R2 1004K.
How can it be unclear? If, for example, the outcome is permitted on that
CPU, then your original reasoning for the WRC+sync+addr doesn't apply
there and SYNC is not transitive. That's what I'm trying to get to the
bottom of.
Does the MIPS kernel target a particular CPU at compile tim...
2011 Jun 19
4
Trying to install ChessBase 8.0 and Hiarcs
I have Ubuntu 11.04 with wine and I am trying to install my ChessBase 8.0 on it using Wine. I have copied the CD to my hard disk and I manage to get the installation splash page, but when I click on Install, it says "Can't Run Setup.Exe"
[Image: http://kayve.net/cannot_setup.png ]
[Image: http://kayve.net/InstallChessBase.png ]
[Image: http://kayve.net/install_Hiarcs.png ]
Can
2016 Jan 12
3
[v3,11/41] mips: reuse asm-generic/barrier.h
(I try to answer on multiple mails in one)
First of all, it seems like some generic notes should be given here:
1. Generic MIPS "SYNC" (aka "SYNC 0") instruction is a very heavy in
some CPUs. On that CPUs it basically kills pipelines in each CPU, can do
a special memory/IO bus transaction (similar to "fence") and hold a
system until all R/W is completed. It is
2011 Dec 29
4
BalloonWorkerThread issue
Hello List,
Merry Christmas to all !!
Basically I''m trying to boot a Windows 2008R2 DC HVM with 90GB static max
memory and 32GB static min.
The node config is Dell M610 with X5660 and 96GB RAM and its running XCP 1.1
Many times the node crashes while booting HVM. Sometimes I get success.
I have attached the HVM boot log of successful start. Many times the node
hangs as soon as the