Displaying 2 results from an estimated 2 matches for "1001907".
2005 Jan 11
5
not sharing IRQ's
...APIC-edge rtc
9: 0 0 IO-APIC-level acpi
12: 56 0 IO-APIC-edge i8042
15: 489 0 IO-APIC-edge ide1
169: 5107236 5082420 IO-APIC-level libata, uhci_hcd, wctdm
177: 2136633 0 IO-APIC-level eth0, Intel ICH5
185: 1001907 6889735 IO-APIC-level uhci_hcd, wctdm
193: 0 0 IO-APIC-level uhci_hcd
201: 0 0 IO-APIC-level ehci_hcd
217: 5978156 1900756 IO-APIC-level wctdm
225: 1917332 5960110 IO-APIC-level wctdm
NMI: 0 0
LOC: 7926852 792...
2009 Jan 07
4
[LLVMdev] Possible bug in the ARM backend?
Hi,
I'm working on the iterated register coalescing graph coloring
allocator and try to test it with all backends available currently in
LLVM.
Initial tests with most of the backends are successful.
It turned out that my allocator triggers a specific assertion in the
RegScavenger and only for the ARM target. It looks like the LR
register is used for frame pointer related things,
but it is