search for: 0xxxxxxxxxxxxxxxxxxxxxxxxxxxx000

...--------------------------------------------------------- when the shift exponent is nonzero, shl nsw nuw must leave the MSB cleared (if not, the result would have been poison): %0:i32 = var %1:i32 = shlnw %0, 3:i32 infer %1 known from LLVM: xxxxxxxxxxxxxxxxxxxxxxxxxxxxx000 known from Souper: 0xxxxxxxxxxxxxxxxxxxxxxxxxxxx000 -------------------------------------------------------------------- higher-order bits could only have been set in the poison case here: %0:i64 = var %1:i64 = subnuw 3:i64, %0 infer %1 known from LLVM: xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx known from Souper: 0000000...