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0xm
2014 Jun 10
2
[LLVMdev] Regarding Instruction definition in LLVM backend
Hi all,
My question is related to the register usage in instruction definition at
TARGETInstrInfo.td file.
I have defined new Target with it Registers and instructions.
Now I need to generate an instruction like:
mov MYREG1_NAME, MYREG2_NAME
for the built-in function taking one constant integer argument, such as
"__builtin_my_function_name(88)"
I wondering whether it is possible