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v4: Updated the wait dependancy bars based on tex component masks. This patch adds proper delays to maxwell exa shaders. Tested with rendercheck -f a8r8g8b8. I am still wondering whether the rd's are required. We could still wait on the write bars instead. eg. see "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in exacmnv110.fp Trello: https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> --- src/shader/exac8nv110.fp | 10 +++++----- src/shader/exac8nv110.fpc...

...d, 93 insertions(+), 93 deletions(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..101b67f 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) ipa $r2 a[0x90] $r0 0x0 0x1 tex nodep $r1 $r2 0x0 0x...

...d, 93 insertions(+), 93 deletions(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..1c4a4f1 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) ipa $r2 a[0x90] $r0 0x0 0x1 tex nodep $r1 $r2 0x0 0x...

...nent masks. > > > > This patch adds proper delays to maxwell exa shaders. Tested with > > rendercheck -f a8r8g8b8. > > > > I am still wondering whether the rd's are required. We could > > still wait on the write bars instead. eg. see > > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in > exacmnv110.fp > > > > Trello: > > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-wit > h-proper-delays > > > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > > ---...

...p b/src/shader/exac8nv110.fp >> index ce78036..1c4a4f1 100644 >> --- a/src/shader/exac8nv110.fp >> +++ b/src/shader/exac8nv110.fp >> @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { >> }; >> #else >> -sched (st 0x0) (st 0x0) (st 0x0) >> +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) >> ipa pass $r0 a[0x7c] 0x0 0x0 0x1 >> mufu rcp $r0 $r0 >> ipa $r3 a[0x94] $r0 0x0 0x1 >> -sched (st 0x0) (st 0x0) (st 0x0) >> +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt >> 0x...

...ependancy bars based on tex component masks. > > This patch adds proper delays to maxwell exa shaders. Tested with > rendercheck -f a8r8g8b8. > > I am still wondering whether the rd's are required. We could > still wait on the write bars instead. eg. see > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in exacmnv110.fp > > Trello: > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > --- > src/shader/exac8nv110.fp | 10 +...

...dependancy bars based on tex component masks. > > This patch adds proper delays to maxwell exa shaders. Tested with > rendercheck -f a8r8g8b8. > > I am still wondering whether the rd's are required. We could > still wait on the write bars instead. eg. see > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in exacmnv110.fp > > Trello: > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > --- > src/shader/exac8nv110.fp | 10 ++++...

...--git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp > index ce78036..101b67f 100644 > --- a/src/shader/exac8nv110.fp > +++ b/src/shader/exac8nv110.fp > @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { > }; > #else > > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) > ipa pass $r0 a[0x7c] 0x0 0x0 0x1 > mufu rcp $r0 $r0 > ipa $r3 a[0x94] $r0 0x0 0x1 > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) > ipa $r2 a[0x90] $r0 0x0...

...1 100644 >> --- a/src/shader/exac8nv110.fp >> +++ b/src/shader/exac8nv110.fp >> @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { >> }; >> #else >> -sched (st 0x0) (st 0x0) (st 0x0) >> +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt >> 0x1) >> ipa pass $r0 a[0x7c] 0x0 0x0 0x1 >> mufu rcp $r0 $r0 >> ipa $r3 a[0x94] $r0 0x0 0x1 >> -sched (st 0x0) (st 0x0) (st 0x0) >> +sched (st 0xf wr 0x1) (st 0xf...

On 06/10/2017 09:14 AM, Aaryaman Vasishta wrote: > See the 'wt' on the first fmul in exacanv110.fp, exacmnv110.fp and > exasanv110.fp. Any ideas on what could be causing the first fmul to > require $r0 and/or $r1? 'tex nodep $r4 $r2 0x0 0x1 t2d 0xf' is actually: 'tex nodep $r4:$r7 $r2 0x0 0x1 t2d 0xf' Very confusing, I know. > > Cheers, > Aaryaman > > On Sat, Jun 10, 2017 at 4:10 PM, Aaryaman Vasishta > <jem456.vasishta at gmail.com <mailto:jem456.vasishta at gmail.com>> wrote: > > T...

...a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp > index ce78036..1c4a4f1 100644 > --- a/src/shader/exac8nv110.fp > +++ b/src/shader/exac8nv110.fp > @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { > }; > #else > > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) > ipa pass $r0 a[0x7c] 0x0 0x0 0x1 > mufu rcp $r0 $r0 > ipa $r3 a[0x94] $r0 0x0 0x1 > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) > ipa $r2 a[0x90] $r0...

...d, 93 insertions(+), 93 deletions(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..1c4a4f1 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) ipa $r2 a[0x90] $r0 0x0 0x1 tex nodep $r1 $r2 0x0 0x...

...b/src/shader/exac8nv110.fp @@ -36,12 +36,11 @@ ipa $r3 a[0x84] $r0 0x0 0x1 sched (st 0x0) (st 0x0) (st 0x0) ipa $r2 a[0x80] $r0 0x0 0x1 tex nodep $r0 $r2 0x0 0x0 t2d 0x8 -depbar le 0x5 0x0 0x0 -sched (st 0x0) (st 0x0) (st 0x0) fmul ftz $r3 $r0 $r1 +sched (st 0x0) (st 0x0) (st 0x0) mov $r2 $r3 0xf mov $r1 $r3 0xf -sched (st 0x0) (st 0x0) (st 0x0) mov $r0 $r3 0xf +sched (st 0x0) (st 0x0) (st 0x0) exit #endif diff --git a/src/shader/exac8nv110.fpc b/src/shader/exac8nv110.fpc index 4aa1368..d8d5517 100644 --- a/src/shader/exac8nv110.fpc +++ b/src/shader/exac8nv110.fpc @@ -20,19 +20,17 @@ 0...

...d, 88 insertions(+), 88 deletions(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index 220d7e5..7797ef4 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,22 +25,22 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 wt 0x3) (st 0xf wr 0x0 wt 0x1) ipa $r2 a[0x90] $r0 0x0 0x1 tex nodep $r1 $r2 0x0 0x1 t2d 0...

...index ce78036..1c4a4f1 100644 > --- a/src/shader/exac8nv110.fp > +++ b/src/shader/exac8nv110.fp > @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { > }; > #else > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) > ipa pass $r0 a[0x7c] 0x0 0x0 0x1 > mufu rcp $r0 $r0 > ipa $r3 a[0x94] $r0 0x0 0x1 > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0x...

...0000000fed1c000-0x00000000fed1ffff] reserved [ 0.000000] reserve setup_data: [mem 0x00000000ff000000-0x00000000ffffffff] reserved [ 0.000000] reserve setup_data: [mem 0x0000000100000000-0x000000083fffffff] usable [ 0.000000] efi: EFI v2.10 by American Megatrends [ 0.000000] efi: SMBIOS=0xf0480 ACPI=0xbedf2000 ACPI 2.0=0xbedf2000 MPS=0xfcc10 [ 0.000000] efi: mem00: type=3, attr=0xf, range=[0x0000000000000000-0x0000000000008000) (0MB) [ 0.000000] efi: mem01: type=2, attr=0xf, range=[0x0000000000008000-0x0000000000009000) (0MB) [ 0.000000] efi: mem02: type=7, attr=0xf, rang...

...171 insertions(+), 141 deletions(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..7537780 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,23 +25,24 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0 wt 0x3f) (st 0xd wr 0x0 wt 0x1) (st 0x1 wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0x2 wr 0x1 rd 0x0 wt 0x3) (st 0x1 wr 0x0 wt 0x1) ipa $r2 a[0x90] $r0 0x0 0x1 tex nodep $r1 $r...

...gnized by the system, this is the output of lspci: 00:0d.0 ISDN controller: Cologne Chip Designs GmbH ISDN network Controller [HFC-8S] (rev 01) and i can load hfcmulti and mISDN_dsp without problems... all channels are configured in TE mode, i use this modprobe: /sbin/modprobe hfcmulti layermask=0xf,0xf,0xf,0xf,0xf,0xf,0xf,0xf protocol=0x2,0x2,0x2,0x2,0x2,0x2,0x2,0x2 type=0x08 /sbin/modprobe mISDN_dsp and this is the output of dmesg: Modular ISDN Stack core $Revision: 1.34 $ mISDNd: kernel daemon started mISDNd: test event done mISDN: HFC-multi driver Rev. 1.41 0 devices registered mISDN_dsp...

Hi! I'm struggeling had to get a hfc pci card working in NT-Mode. I've installed a very basic test system with just one hfc pci card connected to an ISDN-phone over a modified NTBA as described on jollies homepage. I commpiled asterisk as descibed in kape's INSTALL file that comes with 'bri_stuff'. I have not modified the config fieles yet. After connecting to asterisk by

...101006] [<ffffffff81006d22>] ? check_events+0x12/0x20 [354008.101011] [<ffffffff81006d0f>] ? xen_restore_fl_direct_reloc+0x4/0x4 [354008.101017] [<ffffffff81071153>] ? arch_local_irq_restore+0x7/0x8 [354008.101024] [<ffffffff8135049f>] ? _raw_spin_unlock_irqrestore+0xe/0xf [354008.101031] [<ffffffff810be895>] ? release_pages+0xf4/0x14d [354008.101038] [<ffffffff810de78b>] ? free_pages_and_swap_cache+0x48/0x60 [354008.101045] [<ffffffff810cf527>] ? tlb_flush_mmu+0x37/0x50 [354008.101049] [<ffffffff810cf54c>] ? tlb_finish_mmu+0xc/0x31 [3540...