search for: 0xaa

dear redhat, i examined a friend's system today, to help him configure it. assuming that he just "installed" from scratch the samba package, it appears that you have provided a default smb.conf file for redhat 6.1 that puts samba private configuration files in /etc. the suggested options, for example show "smbpasswd file = /etc/smbpasswd". this is REALLY bad. 1) you

...+nv50_grctx_init(struct nouveau_grctx *ctx) +{ + struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; + switch (dev_priv->chipset) { + case 0x50: + case 0x84: + case 0x86: + case 0x92: + case 0x94: + case 0x96: + case 0x98: + case 0xa0: + case 0xa5: + case 0xa8: + case 0xaa: + case 0xac: + break; + default: + NV_ERROR(ctx->dev, "I don't know how to make a ctxprog for your NV%x" + " card.\n", dev_priv->chipset); + NV_ERROR(ctx->dev, "Disabling acceleration. Please contact the devs.\n"); + return -ENOSYS; + +...

...int *verifyPIN*(char **userPin*, char *cardPin, int *cpt) > { > int i; > int status; > int diff; > > if (*cpt > 0) { > status = 0x55; > diff = 0x55; > > for (i = 0; i < 4; i++) { > if (*userPin*[i] != cardPin[i]) { > diff = 0xAA; > } > } > > if (diff == 0x55) { > status = 0xAA; > } > else { > status = 0x55; > } > > if (status == 0xAA) { > *cpt = 3; > return 0xAA; > } else { > *cpt--; > return 0x55; >...

...al name is *verifyPIN*. The variable *bar* is *userPin*. int *verifyPIN*(char **userPin*, char *cardPin, int *cpt) { int i; int status; int diff; if (*cpt > 0) { status = 0x55; diff = 0x55; for (i = 0; i < 4; i++) { if (*userPin*[i] != cardPin[i]) { diff = 0xAA; } } if (diff == 0x55) { status = 0xAA; } else { status = 0x55; } if (status == 0xAA) { *cpt = 3; return 0xAA; } else { *cpt--; return 0x55; } } return 0x55; } @paul: Yes you are right, I have investigated the backend...

I would also like to help as well. As KMacy knows before i asked a lot of questions for T2 types of servers but unfortunately i have no more access to those kind of hardware as well. I;m willing to participate if a team will be formated.

...gt; int verifyPIN(char *userPin, char *cardPin, int *cpt) > { > int i; > int status; > int diff; > > if (*cpt > 0) { > status = 0x55; > diff = 0x55; > > for (i = 0; i < 4; i++) { > if (userPin[i] != cardPin[i]) { > diff = 0xAA; > } > } > > if (diff == 0x55) { > status = 0xAA; > } > else { > status = 0x55; > } > > if (status == 0xAA) { > *cpt = 3; > return 0xAA; > } else { > *cpt--; > return 0x55; >...

...8bf67 100644 --- a/include/linux/poison.h +++ b/include/linux/poison.h @@ -30,13 +30,6 @@ */ #define TIMER_ENTRY_STATIC ((void *) 0x300 + POISON_POINTER_DELTA) -/********** mm/debug-pagealloc.c **********/ -#ifdef CONFIG_PAGE_POISONING_ZERO -#define PAGE_POISON 0x00 -#else -#define PAGE_POISON 0xaa -#endif - /********** mm/page_alloc.c ************/ #define TAIL_MAPPING ((void *) 0x400 + POISON_POINTER_DELTA) diff --git a/mm/page_poison.c b/mm/page_poison.c index e83fd44..8aaf076 100644 --- a/mm/page_poison.c +++ b/mm/page_poison.c @@ -7,6 +7,12 @@ #include <linux/poison.h> #inclu...

...8bf67 100644 --- a/include/linux/poison.h +++ b/include/linux/poison.h @@ -30,13 +30,6 @@ */ #define TIMER_ENTRY_STATIC ((void *) 0x300 + POISON_POINTER_DELTA) -/********** mm/debug-pagealloc.c **********/ -#ifdef CONFIG_PAGE_POISONING_ZERO -#define PAGE_POISON 0x00 -#else -#define PAGE_POISON 0xaa -#endif - /********** mm/page_alloc.c ************/ #define TAIL_MAPPING ((void *) 0x400 + POISON_POINTER_DELTA) diff --git a/mm/page_poison.c b/mm/page_poison.c index e83fd44..8aaf076 100644 --- a/mm/page_poison.c +++ b/mm/page_poison.c @@ -7,6 +7,12 @@ #include <linux/poison.h> #inclu...

...ldrb r1, [r1, #0] 815c: ldrb r3, [r4, #0] 815e: cmp r3, r1 8160: ittt eq 8162: moveq r0, #3 8164: strbeq r0, [r2, #0] 8166: moveq r0, #170 ; 0xaa 8168: pop {r4, r6, r7, pc} // a function return I have a variable bar and here's its corresponding DWARF DIE: <2><3b>: Abbrev Number: 3 (DW_TAG_formal_parameter) <3c> DW_AT_location : 0x0 (location list) <40> DW_AT_nam...

...For FAT32, there are 32 sectors that are reserved by the FS, and I've come up with the following handy chart for which sectors are used where: Sector layout for FAT32 **partition** boot record. ------------------------ sector purpose 0 - boot sector / EBPB offset 510 = 0xFF, 511 = 0xAA 1 - FSINFO Sector offset 510 = 0xFF, 511 = 0xAA 2 - boot 3 offset 510 = 0xFF, 511 = 0xAA 3 - unused 4 - unused 5 - unused 6 - backup boot sector / EBPB offset 510 = 0xFF, 511 = 0xAA 7 - backup FSINFO Sector offset 510 = 0xFF, 511 = 0xAA 8 - backup boot 3...

...rivers/gpu/drm/nouveau/nv50_grctx.c index 3c3cc46..42a8fb2 100644 --- a/drivers/gpu/drm/nouveau/nv50_grctx.c +++ b/drivers/gpu/drm/nouveau/nv50_grctx.c @@ -177,6 +177,7 @@ nv50_grctx_init(struct nouveau_grctx *ctx) case 0x96: case 0x98: case 0xa0: + case 0xa3: case 0xa5: case 0xa8: case 0xaa: @@ -364,6 +365,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) case 0xac: gr_def(ctx, 0x401c00, 0x042500df); break; + case 0xa3: case 0xa5: case 0xa8: gr_def(ctx, 0x401c00, 0x142500df); @@ -418,6 +420,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) break; ca...

...uot; https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=2a4bd8a <quote> Fixes the second DVI output on Quadro FX380. Thanks to NVIDIA for providing the details on the full workaround. [...] + switch (device->chipset) { + case 0x94: + case 0x96: + case 0x98: + case 0xaa: + case 0xac: + return true; [...] </quote> and to Quadro FX380 as defined: 1. https://nouveau.freedesktop.org/wiki/CodeNames/#NV50 NV96 (G96) ... 2. https://en.wikipedia.org/wiki/Nvidia_Quadro G96 ... GeForce 9400 based 3. https://en.wikipedia.org/wiki/List_of_Nvidia_graphics_proc...

...ver1 kernel: [<f88af702>] ext3_truncate+0x39c/0x460 [ext3] Feb 4 00:08:08 server1 kernel: [<c0317627>] __cond_resched+0x14/0x3b Feb 4 00:08:08 server1 kernel: [<f8862737>] journal_start+0x78/0x9e [jbd] Feb 4 00:08:08 server1 kernel: [<f88ad4b5>] ext3_delete_inode+0x60/0xaa [ext3] Feb 4 00:08:23 server1 kernel: [<f88ad455>] ext3_delete_inode+0x0/0xaa [ext3] Feb 4 00:08:23 server1 kernel: [<c018adbb>] generic_delete_inode+0xef/0x229 Feb 4 00:08:23 server1 nrpe[2751]: Error: Could not complete SSL handshake. 5 Feb 4 00:08:23 server1 nrpe[2753]: Error:...

Greetings! Sample program: int main(int argc, char **argv) { int myLocal=0xAA; return 0; } Command: clang t.c -o a.o -c With above simple program we are observing that clang is stat-ing and trying to open various files from lib/tls location. Eventually all calls to "lib/tls" leads to ENOENT (No such file or directory)! <sample_strace> open("path/l...

...9d, 0x9e, 0xa0 }, { 0x9d, 0x9e, 0x9f, 0xa1 }, { 0x9e, 0x9f, 0xa0, 0xa2 }, { 0x9f, 0xa0, 0xa1, 0xa3 }, { 0xa0, 0xa1, 0xa2, 0xa4 }, { 0xa1, 0xa2, 0xa3, 0xa5 }, { 0xa2, 0xa3, 0xa4, 0xa6 }, { 0xa3, 0xa4, 0xa5, 0xa7 }, { 0xa4, 0xa5, 0xa6, 0xa8 }, { 0xa5, 0xa6, 0xa7, 0xa9 }, { 0xa6, 0xa7, 0xa8, 0xaa }, { 0xa7, 0xa8, 0xa9, 0xab }, { 0xa8, 0xa9, 0xaa, 0xac }, { 0xa9, 0xaa, 0xab, 0xad }, { 0xaa, 0xab, 0xac, 0xae }, { 0xab, 0xac, 0xad, 0xaf }, { 0xac, 0xad, 0xae, 0xb0 }, { 0xad, 0xae, 0xaf, 0xb1 }, { 0xae, 0xaf, 0xb0, 0xb2 }, { 0xaf, 0xb0, 0xb1, 0xb3 }, { 0xb0, 0xb1, 0xb2, 0xb4 }, { 0xb...

...sp/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c index fbb8c7d..c9e40e7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c @@ -434,7 +434,8 @@ nv50_disp_dptmds_war(struct nvkm_device *device) case 0x96: case 0x98: case 0xaa: - case 0xac: +/* NVIDIA MCP79/MCP7A "No Signal" */ +/* case 0xac: */ return true; default: break; -- 2.7.4

...9d, 0x9e, 0xa0 }, { 0x9d, 0x9e, 0x9f, 0xa1 }, { 0x9e, 0x9f, 0xa0, 0xa2 }, { 0x9f, 0xa0, 0xa1, 0xa3 }, { 0xa0, 0xa1, 0xa2, 0xa4 }, { 0xa1, 0xa2, 0xa3, 0xa5 }, { 0xa2, 0xa3, 0xa4, 0xa6 }, { 0xa3, 0xa4, 0xa5, 0xa7 }, { 0xa4, 0xa5, 0xa6, 0xa8 }, { 0xa5, 0xa6, 0xa7, 0xa9 }, { 0xa6, 0xa7, 0xa8, 0xaa }, { 0xa7, 0xa8, 0xa9, 0xab }, { 0xa8, 0xa9, 0xaa, 0xac }, { 0xa9, 0xaa, 0xab, 0xad }, { 0xaa, 0xab, 0xac, 0xae }, { 0xab, 0xac, 0xad, 0xaf }, { 0xac, 0xad, 0xae, 0xb0 }, { 0xad, 0xae, 0xaf, 0xb1 }, { 0xae, 0xaf, 0xb0, 0xb2 }, { 0xaf, 0xb0, 0xb1, 0xb3 }, { 0xb0, 0xb1, 0xb2, 0xb4 }, { 0xb...

Hello, LLVM Devs. I'm compiling following code using my own backend: int foo() { char arr[4]; arr[0] = 0xAA; arr[1] = 0xBB; arr[2] = 0xCC; arr[3] = 0xDD; return *(int*)&arr[0]; } The memory operation in "return" statement ends up transformed into 4-byte load in the initial DAG: load<(dereferenceable load 4 from %ir.7, align 1, addrspace 1)> t31, FrameIndex:i32<0&g...

...e/0x10 [354073.738345] __ww_mutex_lock.isra.11+0x3e0/0x750 [354073.738346] __ww_mutex_lock_slowpath+0x16/0x20 [354073.738347] ww_mutex_lock+0x34/0x50 [354073.738352] ttm_eu_reserve_buffers+0x1f9/0x2e0 [ttm] [354073.738356] qxl_release_reserve_list+0x67/0x150 [qxl] [354073.738358] ? qxl_bo_pin+0xaa/0x190 [qxl] [354073.738359] qxl_cursor_atomic_update+0x1b0/0x2e0 [qxl] [354073.738367] drm_atomic_helper_commit_planes+0xb9/0x220 [drm_kms_helper] [354073.738371] drm_atomic_helper_commit_tail+0x2b/0x70 [drm_kms_helper] [354073.738374] commit_tail+0x67/0x70 [drm_kms_helper] [354073.738378] drm...

...e/0x10 [354073.738345] __ww_mutex_lock.isra.11+0x3e0/0x750 [354073.738346] __ww_mutex_lock_slowpath+0x16/0x20 [354073.738347] ww_mutex_lock+0x34/0x50 [354073.738352] ttm_eu_reserve_buffers+0x1f9/0x2e0 [ttm] [354073.738356] qxl_release_reserve_list+0x67/0x150 [qxl] [354073.738358] ? qxl_bo_pin+0xaa/0x190 [qxl] [354073.738359] qxl_cursor_atomic_update+0x1b0/0x2e0 [qxl] [354073.738367] drm_atomic_helper_commit_planes+0xb9/0x220 [drm_kms_helper] [354073.738371] drm_atomic_helper_commit_tail+0x2b/0x70 [drm_kms_helper] [354073.738374] commit_tail+0x67/0x70 [drm_kms_helper] [354073.738378] drm...