search for: 0x8000001d

Displaying 7 results from an estimated 7 matches for "0x8000001d".

Did you mean: 0x8000001f
2020 May 20
2
[PATCH v3 64/75] x86/sev-es: Cache CPUID results for improved performance
...+ */ > + if (lo > 0x80000020) > + return ULONG_MAX; > + > + switch (lo) { > + case 0x00000007: OSPKE may or may not be cached correctly depending on when sev_es_cpuid_cache_initialized is set. > + case 0x0000000b: > + case 0x0000000f: > + case 0x00000010: > + case 0x8000001d: > + case 0x80000020: > + hi = ctxt->regs->cx << 32; > + break; > + default: > + hi = 0; > + } > + > + return hi | lo; This needs to be way more restrictive on what is cached. Unless I've overlooked something, this lets userspace trigger arbitrary, unacc...
2020 May 20
2
[PATCH v3 64/75] x86/sev-es: Cache CPUID results for improved performance
...+ */ > + if (lo > 0x80000020) > + return ULONG_MAX; > + > + switch (lo) { > + case 0x00000007: OSPKE may or may not be cached correctly depending on when sev_es_cpuid_cache_initialized is set. > + case 0x0000000b: > + case 0x0000000f: > + case 0x00000010: > + case 0x8000001d: > + case 0x80000020: > + hi = ctxt->regs->cx << 32; > + break; > + default: > + hi = 0; > + } > + > + return hi | lo; This needs to be way more restrictive on what is cached. Unless I've overlooked something, this lets userspace trigger arbitrary, unacc...
2020 Apr 28
0
[PATCH v3 64/75] x86/sev-es: Cache CPUID results for improved performance
...eroed for use as part + * of the cache index. Future CPUID values may need RCX, but since + * they can't be known, they must not be cached. + */ + if (lo > 0x80000020) + return ULONG_MAX; + + switch (lo) { + case 0x00000007: + case 0x0000000b: + case 0x0000000f: + case 0x00000010: + case 0x8000001d: + case 0x80000020: + hi = ctxt->regs->cx << 32; + break; + default: + hi = 0; + } + + return hi | lo; +} + +static bool sev_es_check_cpuid_cache(struct es_em_ctxt *ctxt, + unsigned long cache_index) +{ + struct sev_es_cpuid_cache_entry *cache_entry; + + if (cache_index == UL...
2008 Jan 26
2
White Cube of Death - fglrx_7_1_0_SUSE103-8.452.1-1
Listmates (only posting to one list) Compiz has been running great with the 8.433 driver except for the libGL SONAME lockup on exit. see: https://bugzilla.novell.com/show_bug.cgi?id=344135 I just built and installed the 8.452 driver. Compiz would not start with the normal fusion-icon approach that I have been using with the 8.433 driver. This is on my Toshiba P35 laptop with an ATI
2008 Mar 24
4
Ati Low Perfomance
...NO (II) Loading sub module "fglrxdrm" (II) LoadModule: "fglrxdrm" (II) Reloading /usr/lib/xorg/modules/linux//libfglrxdrm.so (II) fglrx(0): Depth moves disabled by default (==) fglrx(0): Capabilities: 0x00000000 (==) fglrx(0): CapabilitiesEx: 0x00000000 (==) fglrx(0): cpuFlags: 0x8000001d (==) fglrx(0): OpenGL ClientDriverName: "fglrx_dri.so" (**) fglrx(0): ATI GART size: 256 MB (II) fglrx(0): [pcie] 258048 kB allocated (II) fglrx(0): [drm] DRM buffer queue setup: nbufs = 100 bufsize = 65536 (**) fglrx(0): UseFastTLS=2 (==) fglrx(0): BlockSignalsOnLock=1 (--) Depth 24 pixm...
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
Hi, here is the next version of changes to enable Linux to run as an SEV-ES guest. The code was rebased to v5.7-rc3 and got a fair number of changes since the last version. What is SEV-ES ============== SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted State' and means a hardware feature of AMD processors which hides the register state of VCPUs to the hypervisor by
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
Hi, here is the next version of changes to enable Linux to run as an SEV-ES guest. The code was rebased to v5.7-rc3 and got a fair number of changes since the last version. What is SEV-ES ============== SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted State' and means a hardware feature of AMD processors which hides the register state of VCPUs to the hypervisor by