Displaying 20 results from an estimated 241 matches for "0x800".
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0800
2006 Dec 11
2
malloc(0) returns 0x800 on FreeBSD 6.2 ?
i was debugging a program on FreeBSD 6, and much to my
surprise, i noticed that malloc(0) returns 0x800, as shown
by this program:
> more a.c
#include <stdio.h>
int main(int argc, char *argv[])
{
char *p = malloc(0);
printf(" malloc 0 returns %p\n", p);
}
> cc -o a a.c
> ./a
malloc 0 returns 0x800
if you look at the source this is indeed clear - internally
the...
2013 Jul 02
1
[PATCH] drm/nv50-/disp: Use output specific mask in interrupt
...--- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
@@ -1107,6 +1107,7 @@ nv50_disp_intr_unk20_2(struct nv50_disp_priv *priv, int head)
u32 pclk = nv_rd32(priv, 0x610ad0 + (head * 0x540)) & 0x3fffff;
u32 hval, hreg = 0x614200 + (head * 0x800);
u32 oval, oreg;
+ u32 mask;
u32 conf = exec_clkcmp(priv, head, 0xff, pclk, &outp);
if (conf != ~0) {
if (outp.location == 0 && outp.type == DCB_OUTPUT_DP) {
@@ -1133,6 +1134,7 @@ nv50_disp_intr_unk20_2(struct nv50_disp_priv *priv, int head)
oreg = 0x614280 + (ffs(outp.or)...
2013 Jul 23
4
[PATCH 1/3] drm/nouveau: fix vblank interrupt being called before event is setup
...1..4095f65 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c
@@ -941,7 +941,7 @@ nvd0_disp_intr(struct nouveau_subdev *subdev)
u32 mask = 0x01000000 << i;
if (mask & intr) {
u32 stat = nv_rd32(priv, 0x6100bc + (i * 0x800));
- if (stat & 0x00000001)
+ if ((stat & 0x00000001) && priv->base.vblank)
nouveau_event_trigger(priv->base.vblank, i);
nv_mask(priv, 0x6100bc + (i * 0x800), 0, 0);
nv_rd32(priv, 0x6100c0 + (i * 0x800));
2014 Aug 10
3
[PATCH 1/4] exa/nv10: use same clip settings as mesa driver
The higher 0x800 was getting overwritten by the 0x7ff anyways, so it
wasn't doing any good. The mesa driver just uses 0x800 for the low
portion and doesn't set the 8 bit in the higher portion, so do the same
thing here.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/nv10_exa.c | 4 ++--...
2013 Jan 29
3
[PATCH v4 2/2] Xen: Fix VMCS setting for x2APIC mode guest while enabling APICV
...sr <= 0x1fff )
{
if (type & MSR_TYPE_R)
- __clear_bit(msr, msr_bitmap + 0x000/BYTES_PER_LONG); /* read-low */
+ clear_bit(msr, msr_bitmap + 0x000/BYTES_PER_LONG); /* read-low */
if (type & MSR_TYPE_W)
- __clear_bit(msr, msr_bitmap + 0x800/BYTES_PER_LONG); /* write-low */
+ clear_bit(msr, msr_bitmap + 0x800/BYTES_PER_LONG); /* write-low */
}
else if ( (msr >= 0xc0000000) && (msr <= 0xc0001fff) )
{
msr &= 0x1fff;
if (type & MSR_TYPE_R)
- __clear_bit(msr, msr_...
2012 Jul 27
0
[PATCH 3/3] nouveau: add vblank methods on newer cards
...ers/gpu/drm/nouveau/nouveau_display.c
@@ -364,7 +364,9 @@ nouveau_vblank_enable(struct drm_device *dev, int crtc)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
- if (dev_priv->card_type >= NV_50)
+ if (dev_priv->card_type >= NV_D0)
+ nv_mask(dev, 0x6100c0 + (crtc * 0x800), 0x5, 0x5);
+ else if (dev_priv->card_type >= NV_50)
nv_mask(dev, NV50_PDISPLAY_INTR_EN_1, 0,
NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc));
else
@@ -379,7 +381,9 @@ nouveau_vblank_disable(struct drm_device *dev, int crtc)
{
struct drm_nouveau_private *dev_priv = dev->dev_privat...
2003 Jun 06
0
fxp0: device timeout
...didn't follow it ... and now I
can't seem to find it in the archives to go through it now that its hit me
...
This morning, after 5 days of uptime, my server got hit with:
Jun 6 09:52:19 pluto /kernel: fxp0: device timeout
Jun 6 09:52:19 pluto /kernel: fxp0: SCB timeout: 0x60 0x0 0x0 0x800
Jun 6 09:52:19 pluto /kernel: fxp0: DMA timeout
Jun 6 09:52:19 pluto last message repeated 2 times
Jun 6 09:52:19 pluto /kernel: fxp0: SCB timeout: 0x10 0x0 0x80 0x800
Jun 6 09:52:19 pluto /kernel: fxp0: SCB timeout: 0x10 0x0 0x80 0x800
Jun 6 09:52:33 pluto /kernel: fxp0: device timeout
Now...
2013 Jul 30
0
[PATCH 1/3] drm/nouveau: fix vblank interrupt being called before event is setup
...> +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c
> @@ -941,7 +941,7 @@ nvd0_disp_intr(struct nouveau_subdev *subdev)
> u32 mask = 0x01000000 << i;
> if (mask & intr) {
> u32 stat = nv_rd32(priv, 0x6100bc + (i * 0x800));
> - if (stat & 0x00000001)
> + if ((stat & 0x00000001) && priv->base.vblank)
> nouveau_event_trigger(priv->base.vblank, i);
> nv_mask(priv, 0x6100bc + (i * 0x800)...
2011 Oct 04
2
[LLVMdev] [cfe-dev] Unicode path handling on Windows
...=====================================
--- lib/Basic/ConvertUTF.c (revision 141071)
+++ lib/Basic/ConvertUTF.c (working copy)
@@ -218,74 +218,7 @@
+ /* Figure out how many bytes the result will require */
+ if (ch < (UTF32)0x80) { bytesToWrite = 1;
+ } else if (ch < (UTF32)0x800) { bytesToWrite = 2;
+ } else if (ch < (UTF32)0x10000) { bytesToWrite = 3;
+ } else if (ch < (UTF32)0x110000) { bytesToWrite = 4;
+ } else { bytesToWrite = 3;
+ ch = UNI_REPLACEMENT_CHAR;
+ }
I think this should be formatted more lik...
2011 Nov 24
1
[PATCH] nouveau: implement precise vblank timestamping
...SYNC_DURATION 0x00610b00
#define NV50_PDISPLAY_CRTC_MODE_UNK2 0x00610b08
@@ -800,6 +800,13 @@
#define NV50_PDISPLAY_SOR_CLK 0x00614000
#define NV50_PDISPLAY_SOR_CLK_CTRL2(i) ((i) * 0x800 + 0x614300)
+#define NV50_PDISPLAY_CRTC_STAT_VERT(i0) (0x00616340 + 0x800*(i0))
+#define NV50_PDISPLAY_CRTC_STAT_VERT_VLINE__MASK 0x0000ffff
+#define NV50_PDISPLAY_CRTC_STAT_VERT_VBLANK_COUNT__MASK 0xffff0000
+#define NV50_PDISPLAY_CRTC_STAT_VERT_VBLANK_COUNT__SHIFT 16
+#define NV50_PDI...
2013 Aug 12
0
[RFC PATCH] drm/nv50-nvd0: implement precise vblank timing support on nv50/nvc0.
...50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
@@ -1285,6 +1285,57 @@ nv50_disp_intr(struct nouveau_subdev *subdev)
}
}
+u32 nv50_disp_get_vblank_count(struct nouveau_disp *disp, int head)
+{
+ if (head < 0 || head >= 2)
+ return 0;
+
+ return nv_rd32(disp, 0x616340 + head * 0x800) >> 16;
+}
+
+int nv50_disp_get_scanoutpos(struct nouveau_disp *disp, int head, int *vpos, int *hpos)
+{
+ u32 reg, vbias, hbias, vbl_start, vbl_end, hline, vline;
+
+ if (head < 0 || head >= 2)
+ return -1;
+
+ reg = nv_rd32(disp, 0x610ae8 + head * 4);
+ vbias = reg >> 16;
+ hbi...
2011 Oct 04
0
[LLVMdev] [cfe-dev] Unicode path handling on Windows
In that case I think that this is it :)
On Tue, Oct 4, 2011 at 8:24 AM, Bryce Cogswell <bryceco at gmail.com> wrote:
> That should be fine. I don't believe the concern about performing a
> char-by-char conversion is valid; for example the NTFS-3G driver uses a
> simplistic upcase table and seems to work fine. I suspect Windows does the
> same.
>
>
-------------- next
2016 Mar 21
0
[PATCH 0/1] ipconfig DHCP bug
...of distros.
Basically the function dhcp_send() at dhcp_proto.c
mistakenly define
bootp.yiaddr = dev->ip_addr;
when in a client originated DHCP DHCPREQUEST(RFC2131 Page 36)
it should be
bootp.yiaddr = INADDR_ANY; // "0"
and also it forgets to define the flags
bootp.flags = htons(0x800);
Best,
Patrick
Signed-off-by: Patrick Masotta <masottaus at yahoo.com>
---
diff -uprN a/klibc-2.0.4/usr/kinit/ipconfig/dhcp_proto.c b/klibc-2.0.4/usr/kinit/ipconfig/dhcp_proto.c
--- a/klibc-2.0.4/usr/kinit/ipconfig/dhcp_proto.c 2014-07-09 09:21:02.000000000 -0600
+++ b/klibc-2.0.4...
2002 Apr 18
2
InstallShield problems
...environments. There's a window coming up saying that "Setup is preparing the
InstallShield Wizard, which will guide you through the rest of the setup
process. Please Wait." and this is absolutely OK, but there's an other
message which says "Error installing iKernel.exe: (0x800)".
There's no message to console.
Do you know a way to solve this? :(
Kind regards,
MBJr.
2014 Aug 12
0
[PATCH 2/4] drm/nouveau: Replaced magic numbers with defines from nouveau_reg
...s/gpu/drm/nouveau/core/engine/disp/dacnv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
@@ -31,11 +31,12 @@
#include <subdev/timer.h>
#include "nv50.h"
+#include "nouveau_reg.h"
int
nv50_dac_power(NV50_DISP_MTHD_V1)
{
- const u32 doff = outp->or * 0x800;
+ const u32 dpms_ctrl = NV50_PDISPLAY_DAC_DPMS_CTRL(outp->or);
union {
struct nv50_disp_dac_pwr_v0 v0;
} *args = data;
@@ -55,19 +56,21 @@ nv50_dac_power(NV50_DISP_MTHD_V1)
} else
return ret;
- nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
- nv_mask(priv, 0x61a004 + doff...
2005 Aug 27
1
Nortell Release 11 and Asterisk E1
...R2 UniCall/30 Call control(6)
Aug 27 09:16:36 WARNING[6496]: chan_unicall.c:704 unicall_report:
MFC/R2 UniCall/30 Drop call(cause=Normal Clearing [16])
Aug 27 09:16:36 WARNING[6496]: chan_unicall.c:704 unicall_report:
MFC/R2 UniCall/30 Call disconnected(cause=Normal, unspecified cause
[31]) - state 0x800
Aug 27 09:16:36 WARNING[6496]: chan_unicall.c:2865 handle_uc_event:
Unicall/30 event Drop call
Aug 27 09:16:36 WARNING[6496]: chan_unicall.c:704 unicall_report:
MFC/R2 UniCall/30 Call control(7)
Aug 27 09:16:36 WARNING[6496]: chan_unicall.c:704 unicall_report:
MFC/R2 UniCall/30 Release call
Aug 27...
2005 Aug 27
5
Asterisk and a Meridian Nortell Release 11
...R2 UniCall/30 Call control(6)
Aug 27 09:16:36 WARNING[6496]: chan_unicall.c:704 unicall_report:
MFC/R2 UniCall/30 Drop call(cause=Normal Clearing [16])
Aug 27 09:16:36 WARNING[6496]: chan_unicall.c:704 unicall_report:
MFC/R2 UniCall/30 Call disconnected(cause=Normal, unspecified cause
[31]) - state 0x800
Aug 27 09:16:36 WARNING[6496]: chan_unicall.c:2865 handle_uc_event:
Unicall/30 event Drop call
Aug 27 09:16:36 WARNING[6496]: chan_unicall.c:704 unicall_report:
MFC/R2 UniCall/30 Call control(7)
Aug 27 09:16:36 WARNING[6496]: chan_unicall.c:704 unicall_report:
MFC/R2 UniCall/30 Release call
Aug 27...
2007 Dec 06
0
astunicall-1.2.21.0.1 packages and Sangoma A104D
...UniCall/116 Call control(6)
Dec 5 22:27:12 WARNING[3868]: chan_unicall.c:627 unicall_report:
MFC/R2 UniCall/116 Drop call(cause=Normal Clearing [16])
Dec 5 22:27:12 WARNING[3868]: chan_unicall.c:627 unicall_report:
MFC/R2 UniCall/116 Call disconnected(cause=Normal, unspecified cause
[31]) - state 0x800
Dec 5 22:27:12 WARNING[3868]: chan_unicall.c:2644 handle_uc_event:
Unicall/116 event Drop call
Dec 5 22:27:12 WARNING[3868]: chan_unicall.c:627 unicall_report:
MFC/R2 UniCall/116 Call control(7)
Dec 5 22:27:12 WARNING[3868]: chan_unicall.c:627 unicall_report:
MFC/R2 UniCall/116 Release call
Dec...
2012 Jan 07
2
PXELINUX: how to debug initrd corruption?
...d image corruption?
I've examined the TFTP transfers with Wireshark; they appear OK.
I have not tried a more modern pxelinux.0 yet.
2. Can anyone provide a description or simple diagram of what regions of
system memory PXELINUX uses?
>From the linker file, I know that .earlybss starts at 0x800 (or 0x1000),
and a number of sections directly follow it.
I also realize some allocated regions are system specific, depending on
what the BIOS returns in its E820 map.
I am, not surprisingly, interested in the regions where PXELINUX stores
the kernel and initramdisk images after TFTP-ing them over...
2004 Mar 31
4
ANNOUNCEMENT : MeetMe Web User Interface
...ags (65280) */
#define ZT_CONF_LISTENER 0x100 /* is a listener on the
conference (256)*/
#define ZT_CONF_TALKER 0x200 /* is a talker on the conference
(512)*/
#define ZT_CONF_PSEUDO_LISTENER 0x400 /* pseudo is a listener on the
conference (1024)*/
#define ZT_CONF_PSEUDO_TALKER 0x800 /* pseudo is a talker on the
conference (2048) */