Displaying 20 results from an estimated 420 matches for "0x40000000".
Did you mean:
0x00000000
2012 Apr 30
2
x86info: dump kvm cpuid's
...Natapov wrote:
> On Sun, Apr 29, 2012 at 01:10:21PM +0300, Michael S. Tsirkin wrote:
> > The following makes 'x86info -r' dump kvm cpu ids
> > (signature+features) when running in a vm.
> >
> > On the guest we see the signature and the features:
> > eax in: 0x40000000, eax = 00000000 ebx = 4b4d564b ecx = 564b4d56 edx = 0000004d
> > eax in: 0x40000001, eax = 0100007b ebx = 00000000 ecx = 00000000 edx = 00000000
> >
> > On the host it just adds a couple of zero lines:
> > eax in: 0x40000000, eax = 00000000 ebx = 00000000 ecx = 00000000 edx...
2012 Apr 30
2
x86info: dump kvm cpuid's
...Natapov wrote:
> On Sun, Apr 29, 2012 at 01:10:21PM +0300, Michael S. Tsirkin wrote:
> > The following makes 'x86info -r' dump kvm cpu ids
> > (signature+features) when running in a vm.
> >
> > On the guest we see the signature and the features:
> > eax in: 0x40000000, eax = 00000000 ebx = 4b4d564b ecx = 564b4d56 edx = 0000004d
> > eax in: 0x40000001, eax = 0100007b ebx = 00000000 ecx = 00000000 edx = 00000000
> >
> > On the host it just adds a couple of zero lines:
> > eax in: 0x40000000, eax = 00000000 ebx = 00000000 ecx = 00000000 edx...
2007 Sep 27
1
Unsigned bug in rdmsr_hypervisor_regs/wrmsr_hypervisor_regs
The code, below, in rdmsr_hypervisor_regs (in xen/arch/x86/traps.c) looks
wrong. (The same code is in wrmsr_hypervisor_regs.)
int rdmsr_hypervisor_regs(
uint32_t idx, uint32_t *eax, uint32_t *edx)
{
idx -= 0x40000000;
if ( idx > 0 )
return 0;
...
The intent, apparently, is that the function should return zero if the
original idx exceeds 0x40000000.
However because idx is unsigned the function will always return zero
unlessthe original idx is precisely 0x40000000.
The effect is that reading or w...
2012 Apr 30
4
[PATCHv2] x86info: dump kvm cpuid's
The following makes 'x86info -r' dump hypervisor leaf cpu ids
(for kvm this is signature+features) when running in a vm.
On the guest we see the signature and the features:
eax in: 0x40000000, eax = 00000000 ebx = 4b4d564b ecx = 564b4d56 edx = 0000004d
eax in: 0x40000001, eax = 0100007b ebx = 00000000 ecx = 00000000 edx = 00000000
Hypervisor flag is checked to avoid output changes when not
running on a VM.
Signed-off-by: Michael S. Tsirkin <mst at redhat.com>
Changes from v1:...
2012 Apr 30
4
[PATCHv2] x86info: dump kvm cpuid's
The following makes 'x86info -r' dump hypervisor leaf cpu ids
(for kvm this is signature+features) when running in a vm.
On the guest we see the signature and the features:
eax in: 0x40000000, eax = 00000000 ebx = 4b4d564b ecx = 564b4d56 edx = 0000004d
eax in: 0x40000001, eax = 0100007b ebx = 00000000 ecx = 00000000 edx = 00000000
Hypervisor flag is checked to avoid output changes when not
running on a VM.
Signed-off-by: Michael S. Tsirkin <mst at redhat.com>
Changes from v1:...
2018 Jan 25
3
[PATCH] drm/nouveau/therm/gp100: Do not report temperature when subdev is shadowed
...dex 9f0dea3f61dc..45d0ec632b5a 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.c
@@ -32,8 +32,10 @@ gp100_temp_get(struct nvkm_therm *therm)
u32 inttemp = (tsensor & 0x0001fff8);
/* device SHADOWed */
- if (tsensor & 0x40000000)
+ if (tsensor & 0x40000000) {
nvkm_trace(subdev, "reading temperature from SHADOWed sensor\n");
+ return -ENODEV;
+ }
/* device valid */
if (tsensor & 0x20000000)
--
2.16.1
2018 Jan 10
0
Panic: file mail-index-util.c: line 37 (mail_index_uint32_to_offset): assertion failed: (offset < 0x40000000)
...ion mails inside. And
> from time to time the index cache make problems and i got the
> following in the logs:
>
> --- Snip ---
> Jan 10 20:43:04 XXXXX dovecot: imap(XXXXX): Panic: file
> mail-index-util.c: line 37 (mail_index_uint32_to_offset): assertion
> failed: (offset < 0x40000000)
> --- Snap ---
>
> I skip the raw backtrace to keep the post "small", but can hand it in
> later if needed. Got this for UID FETCH, UID SEARCH, UID SORT, ...
>
> The size of the file dovecot.index.cache of INBOX was in the last seen
> problem situations between 1.1GB...
2018 Jan 11
0
Panic: file mail-index-util.c: line 37 (mail_index_uint32_to_offset): assertion failed: (offset < 0x40000000)
...ion mails inside. And
> from time to time the index cache make problems and i got the
> following in the logs:
>
> --- Snip ---
> Jan 10 20:43:04 XXXXX dovecot: imap(XXXXX): Panic: file
> mail-index-util.c: line 37 (mail_index_uint32_to_offset): assertion
> failed: (offset < 0x40000000)
> --- Snap ---
>
> I skip the raw backtrace to keep the post "small", but can hand it in
> later if needed. Got this for UID FETCH, UID SEARCH, UID SORT, ...
>
> The size of the file dovecot.index.cache of INBOX was in the last seen
> problem situations between 1.1GB...
2018 Jan 10
4
Panic: file mail-index-util.c: line 37 (mail_index_uint32_to_offset): assertion failed: (offset < 0x40000000)
...this account has ~1.1 - ~1.7 million mails inside. And
from time to time the index cache make problems and i got the
following in the logs:
--- Snip ---
Jan 10 20:43:04 XXXXX dovecot: imap(XXXXX): Panic: file
mail-index-util.c: line 37 (mail_index_uint32_to_offset): assertion
failed: (offset < 0x40000000)
--- Snap ---
I skip the raw backtrace to keep the post "small", but can hand it in
later if needed. Got this for UID FETCH, UID SEARCH, UID SORT, ...
The size of the file dovecot.index.cache of INBOX was in the last seen
problem situations between 1.1GB to 2.3GB.
To solve the problem...
2018 Jan 10
1
Panic: file mail-index-util.c: line 37 (mail_index_uint32_to_offset): assertion failed: (offset < 0x40000000)
You are storing 1.7 million e-mails in a single mbox file. I would rather store the archive using one file per e-mail.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://dovecot.org/pipermail/dovecot/attachments/20180110/18899b94/attachment.html>
2017 Jan 17
0
[PATCH 1/6] drm/nouveau: Extend NVKM HDMI power control method to set InfoFrames
...}
+
+ if (args->v0.flags &
+ NV50_DISP_MTHD_V1_SOR_HDMI_PWR_FLAG_VENDOR_INFOFRAME) {
+ vendor_infoframe = data;
+ if ((ret = nvif_unpack(-ENOSYS, &data, &size,
+ *vendor_infoframe, 0, 0, true)))
+ return ret;
+ }
+
+ if (size)
+ return -E2BIG;
+
if (!(ctrl & 0x40000000)) {
nvkm_mask(device, 0x6165a4 + hoff, 0x40000000, 0x00000000);
nvkm_mask(device, 0x616520 + hoff, 0x00000001, 0x00000000);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c
index 632f02d..c492cd7 100644
--- a/drivers/gpu/...
2017 Jul 27
2
Tail merging "undef" with a defined register: wrong code
...c
bb.2:
successors: %bb.3
PS_storerhabs 0, undef %r0
J2_jump %bb.3, implicit-def %pc
bb.3:
PS_jmpret killed %r31, implicit-def %pc
...
Run:
llc -march=hexagon -run-pass branch-folder test.mir -o -
We get an invalid code:
body: |
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
J2_jumpt undef %p0, %bb.2, implicit-def %pc
bb.1:
successors: %bb.2(0x80000000)
%r0 = L2_loadruh_io undef %r0, 0
bb.2:
liveins: %r0 ; Invalid: r0 is not live out of bb.0
PS_storerhabs 0, %r0
PS_jmpret killed %r31, implicit-def %pc
......
2008 Oct 01
5
[RFC] CPUID usage for interaction between Hypervisors and Linux.
Hi,
Please find below the proposal for the generic use of cpuid space
allotted for hypervisors. Apart from this cpuid space another thing
worth noting would be that, Intel & AMD reserve the MSRs from 0x40000000
- 0x400000FF for software use. Though the proposal doesn't talk about
MSR's right now, we should be aware of these reservations as we may want
to extend the way we use CPUID to MSR usage as well.
While we are at it, we also think we should form a group which has at
least one person represe...
2008 Oct 01
5
[RFC] CPUID usage for interaction between Hypervisors and Linux.
Hi,
Please find below the proposal for the generic use of cpuid space
allotted for hypervisors. Apart from this cpuid space another thing
worth noting would be that, Intel & AMD reserve the MSRs from 0x40000000
- 0x400000FF for software use. Though the proposal doesn't talk about
MSR's right now, we should be aware of these reservations as we may want
to extend the way we use CPUID to MSR usage as well.
While we are at it, we also think we should form a group which has at
least one person represe...
2018 Jan 26
2
[PATCH] drm/nouveau/therm/gp100: Do not report temperature when subdev is shadowed
.../subdev/therm/gp100.c
>> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.c
>> @@ -32,8 +32,10 @@ gp100_temp_get(struct nvkm_therm *therm)
>> u32 inttemp = (tsensor & 0x0001fff8);
>>
>> /* device SHADOWed */
>> - if (tsensor & 0x40000000)
>> + if (tsensor & 0x40000000) {
>> nvkm_trace(subdev, "reading temperature from SHADOWed sensor\n");
>> + return -ENODEV;
>> + }
>>
>> /* device valid */
>> if (tsensor & 0x200...
2019 May 24
0
Panic: file mail-index-util.c: line 10 (mail_index_uint32_to_offset): assertion failed: (offset < 0x40000000)
...d:
>
> % doveadm import -u restore at backup.invalid mdbox:/home/copymail2/mdbox '' mailbox INBOX header X-Spam Yes SAVEDBEFORE 2019-05-23
>
> doveadm(restore at backup.invalid): Panic: file mail-index-util.c: line 10 (mail_index_uint32_to_offset): assertion failed: (offset < 0x40000000)
> doveadm(restore at backup.invalid): Error: Raw backtrace:
> /usr/lib/dovecot/libdovecot.so.0(+0xd9f9e) [0x7fbc52ba7f9e] ->
> /usr/lib/dovecot/libdovecot.so.0(+0xd9fe1) [0x7fbc52ba7fe1] ->
> /usr/lib/dovecot/libdovecot.so.0(i_fatal+0) [0x7fbc52b0cc54] ->
> /usr/lib/dovecot...
2020 Jan 10
0
Panic: file mail-index-util.c: line 10 (mail_index_uint32_to_offset): assertion failed: (offset < 0x40000000)
...trying this:
doveadm import -u restore at backup.invalid mdbox:/home/copymail2/mdbox "" \
mailbox INBOX header X-Spam Yes
nd I'm getting:
doveadm(restore at backup.invalid): Panic: file mail-index-util.c: line 10 (mail_index_uint32_to_offset): assertion failed: (offset < 0x40000000)
doveadm(restore at backup.invalid): Error: Raw backtrace: /usr/lib/dovecot/libdovecot.so.0(backtrace_append+0x42)
[0x7f598de6cac2] -> /usr/lib/dovecot/libdovecot.so.0(backtrace_get+0x1e)
[0x7f598de6cbde] -> /usr/lib/dovecot/libdovecot.so.0(+0xe989e)
[0x7f598de7789e] -> /usr/lib/dovecot/l...
2017 Jan 17
32
[PATCH 0/6] drm/nouveau: Enable HDMI Stereoscopy
This is an initial implementation of HDMI 3D mode support for the
nouveau kernel driver. It works on all of the hardware that I have
available to test at the moment, but I am unsure as to the overall
approach taken for setting HDMI InfoFrames, there's no support for g84
or gf119 disps, and the criteria for enabling stereo support for an
output seems a bit iffy.
The first four patches arrange
2014 Sep 18
5
Standardizing an MSR or other hypercall to get an RNG seed?
...o possible, but extending the hypervisor CPUID range
> beywond 400000FFH is not officially sanctioned by Intel.
>
> Xen started doing that in order to expose both Hyper-V and Xen
> CPUID leaves, and KVM followed the practice.
>
Whoops.
Might Intel be willing to extend that range to 0x40000000 -
0x400fffff? And would Microsoft be okay with using this mechanism for
discovery?
Do we have anyone from VMware in this thread? I don't have any VMware contacts.
--Andy
2014 Sep 18
5
Standardizing an MSR or other hypercall to get an RNG seed?
...o possible, but extending the hypervisor CPUID range
> beywond 400000FFH is not officially sanctioned by Intel.
>
> Xen started doing that in order to expose both Hyper-V and Xen
> CPUID leaves, and KVM followed the practice.
>
Whoops.
Might Intel be willing to extend that range to 0x40000000 -
0x400fffff? And would Microsoft be okay with using this mechanism for
discovery?
Do we have anyone from VMware in this thread? I don't have any VMware contacts.
--Andy