search for: 0x1fff

...VERY; + SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY | + SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE; _vmx_secondary_exec_control = adjust_vmx_controls( @@ -659,17 +660,47 @@ void vmx_disable_intercept_for_msr(struct vcpu *v, u32 msr, int type) if ( msr <= 0x1fff ) { if (type & MSR_TYPE_R) - __clear_bit(msr, msr_bitmap + 0x000/BYTES_PER_LONG); /* read-low */ + clear_bit(msr, msr_bitmap + 0x000/BYTES_PER_LONG); /* read-low */ if (type & MSR_TYPE_W) - __clear_bit(msr, msr_bitmap + 0x800/BYTES_PER...

..._priv base; +}; + +static int +gm107_fan_pwm_ctrl(struct nouveau_therm *therm, int line, bool enable) +{ + /* nothing to do, it seems hardwired */ + return 0; +} + +static int +gm107_fan_pwm_get(struct nouveau_therm *therm, int line, u32 *divs, u32 *duty) +{ + *divs = nv_rd32(therm, 0x10eb20) & 0x1fff; + *duty = nv_rd32(therm, 0x10eb24) & 0x1fff; + return 0; +} + +static int +gm107_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty) +{ + nv_mask(therm, 0x10eb10, 0x1fff, divs); /* keep the high bits */ + nv_wr32(therm, 0x10eb14, duty | 0x80000000); + return 0; +} + +static...

From: Martin Peres <martin.peres at labri.fr> Re-use the therm-exported fan structure with only two minor modifications: - pwm_freq: u16 -> u32; - add fan_type (toggle or PWM) Signed-off-by: Martin Peres <martin.peres at free.fr> --- drm/Kbuild | 1 + drm/core/include/subdev/bios/fan.h | 1 + drm/core/subdev/bios/fan.c | 1 +

...device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nvbios *bios = &dev_priv->VBIOS; + int temp; + int correction = bios->sensor.temp_correction; + int offset = 0; + + if (dev_priv->chipset >= 0x46) + temp = nv_rd32(dev, NV40_PMC_TEMP_VALUE) & 0x1fff; + else + temp = nv_rd32(dev, NV40_PMC_TEMP_VALUE) & 0xfff; + + if (bios->sensor.diode_offset_div) + offset = bios->sensor.diode_offset_mult / + bios->sensor.diode_offset_div; + + if ((temp & 0xfff) == 0) { + /* Set up the sensor */ + int max_temp = (120 - offset - correction...

...fset 0x1a may corrupt adjacent RW1C bits > > [ 6.485411] pci 0000:00:01.0: BAR 15: assigned [mem 0x58000000-0x63ffffff 64bit pref] > > [ 6.485431] pci 0000:00:01.0: BAR 14: assigned [mem 0x50800000-0x51ffffff] > > [ 6.485448] pci 0000:00:01.0: BAR 13: assigned [io 0x1000-0x1fff] > > [ 6.485471] pci 0000:01:00.0: BAR 1: assigned [mem 0x58000000-0x5fffffff 64bit pref] > > [ 6.485510] pci 0000:01:00.0: BAR 3: assigned [mem 0x60000000-0x61ffffff 64bit pref] > > [ 6.485547] pci 0000:01:00.0: BAR 0: assigned [mem 0x51000000-0x51ffffff] > > [...

...uot;/> </clock> ... <qemu:commandline>a <qemu:arg value='-machine'/> <qemu:arg value='kernel_irqchip=on'/> <qemu:arg value='-cpu'/> <qemu:arg value='host,migratable=no,+invtsc,hv_time,+kvm_pv_eoi,hv_relaxed,hv_spinlocks=0x1fff,hv_vendor_id=nv_fuck_you!,kvm=off'/> </qemu:commandline> The important part here is "host,migratable=no,+invtsc". It gives guest the invariant TSC (CPU must support it). This is a bit of a hack. Everything, except migratable=no, can be configured through proper XML elements,...

Hi. I have a series of patches to sandbox dhclient using Capsicum (capability mode and capability rights for descriptors). As usual, because chroot and setgid/setuid are not sandboxing mechanisms, there are many problems with the current sandboxing: - Access to various global namespaces (like process list, network, etc.). - Access to RAW UDP socket. - Read/write access to bpf. - Access to RAW

...0000:00:01.0 offset 0x1a may corrupt adjacent RW1C bits > [ 6.485411] pci 0000:00:01.0: BAR 15: assigned [mem 0x58000000-0x63ffffff 64bit pref] > [ 6.485431] pci 0000:00:01.0: BAR 14: assigned [mem 0x50800000-0x51ffffff] > [ 6.485448] pci 0000:00:01.0: BAR 13: assigned [io 0x1000-0x1fff] > [ 6.485471] pci 0000:01:00.0: BAR 1: assigned [mem 0x58000000-0x5fffffff 64bit pref] > [ 6.485510] pci 0000:01:00.0: BAR 3: assigned [mem 0x60000000-0x61ffffff 64bit pref] > [ 6.485547] pci 0000:01:00.0: BAR 0: assigned [mem 0x51000000-0x51ffffff] > [ 6.485569] pci 0000:0...

This is version 0.5 of the virtio-iommu specification, the paravirtualized IOMMU. This version addresses feedback from v0.4 and adds an event virtqueue. Please find the specification, LaTeX sources and pdf, at: git://linux-arm.org/virtio-iommu.git viommu/v0.5 http://linux-arm.org/git?p=virtio-iommu.git;a=blob;f=dist/v0.5/virtio-iommu-v0.5.pdf A detailed changelog since v0.4 follows. You can find

...\ > / | | PCI domain 1 > / 0xffff 0xffff / > vIOMMU 1 > \ 0x10000 0x0 \ > \ | | PCI domain 2 > \ 0x1ffff 0xffff / > > / 0x0 \ > / | platform devices > / 0x1fff / > vIOMMU 2 > \ 0x2000 0x0 \ >...

This is version 0.5 of the virtio-iommu specification, the paravirtualized IOMMU. This version addresses feedback from v0.4 and adds an event virtqueue. Please find the specification, LaTeX sources and pdf, at: git://linux-arm.org/virtio-iommu.git viommu/v0.5 http://linux-arm.org/git?p=virtio-iommu.git;a=blob;f=dist/v0.5/virtio-iommu-v0.5.pdf A detailed changelog since v0.4 follows. You can find

...\ > / | | PCI domain 1 > / 0xffff 0xffff / > vIOMMU 1 > \ 0x10000 0x0 \ > \ | | PCI domain 2 > \ 0x1ffff 0xffff / > > / 0x0 \ > / | platform devices > / 0x1fff / > vIOMMU 2 > \ 0x2000 0x0 \ >...

...kvm/kvmi.c +++ b/arch/x86/kvm/kvmi.c @@ -369,6 +369,72 @@ static void kvmi_arch_disable_desc_intercept(struct kvm_vcpu *vcpu) vcpu->arch.kvmi->descriptor.kvm_intercepted = false; } +static unsigned long *msr_mask(struct kvm_vcpu *vcpu, unsigned int *msr) +{ + switch (*msr) { + case 0 ... 0x1fff: + return vcpu->arch.kvmi->msrw.kvmi_mask.low; + case 0xc0000000 ... 0xc0001fff: + *msr &= 0x1fff; + return vcpu->arch.kvmi->msrw.kvmi_mask.high; + } + + return NULL; +} + +static bool test_msr_mask(struct kvm_vcpu *vcpu, unsigned int msr) +{ + unsigned long *mask = msr_mask(vcpu...

...orrupt adjacent RW1C bits > > > [ 6.485411] pci 0000:00:01.0: BAR 15: assigned [mem 0x58000000-0x63ffffff 64bit pref] > > > [ 6.485431] pci 0000:00:01.0: BAR 14: assigned [mem 0x50800000-0x51ffffff] > > > [ 6.485448] pci 0000:00:01.0: BAR 13: assigned [io 0x1000-0x1fff] > > > [ 6.485471] pci 0000:01:00.0: BAR 1: assigned [mem 0x58000000-0x5fffffff 64bit pref] > > > [ 6.485510] pci 0000:01:00.0: BAR 3: assigned [mem 0x60000000-0x61ffffff 64bit pref] > > > [ 6.485547] pci 0000:01:00.0: BAR 0: assigned [mem 0x51000000-0x51ffffff]...

...orrupt adjacent RW1C bits > > > [ 6.485411] pci 0000:00:01.0: BAR 15: assigned [mem 0x58000000-0x63ffffff 64bit pref] > > > [ 6.485431] pci 0000:00:01.0: BAR 14: assigned [mem 0x50800000-0x51ffffff] > > > [ 6.485448] pci 0000:00:01.0: BAR 13: assigned [io 0x1000-0x1fff] > > > [ 6.485471] pci 0000:01:00.0: BAR 1: assigned [mem 0x58000000-0x5fffffff 64bit pref] > > > [ 6.485510] pci 0000:01:00.0: BAR 3: assigned [mem 0x60000000-0x61ffffff 64bit pref] > > > [ 6.485547] pci 0000:01:00.0: BAR 0: assigned [mem 0x51000000-0x51ffffff]...

...4f3..a48e72f520da 100644 --- a/arch/x86/kvm/kvmi.c +++ b/arch/x86/kvm/kvmi.c @@ -419,6 +419,76 @@ static void kvmi_arch_disable_desc_intercept(struct kvm_vcpu *vcpu) vcpu->arch.kvmi->descriptor.kvm_intercepted = false; } +static bool kvmi_msr_valid(unsigned int msr) +{ + return msr <= 0x1fff || (msr >= 0xc0000000 && msr <= 0xc0001fff); +} + +static unsigned long *msr_mask(struct kvm_vcpu *vcpu, unsigned int *msr) +{ + switch (*msr) { + case 0 ... 0x1fff: + return vcpu->arch.kvmi->msrw.kvmi_mask.low; + case 0xc0000000 ... 0xc0001fff: + *msr &= 0x1fff; + return...

.../s Any clues? /usr/bin/qemu-system-x86_64 -machine accel=kvm -name win10-box -S -machine pc-i440fx-2.4,accel=kvm,usb=off,vmport=off -cpu SandyBridge,+osxsave,+pcid,+pdcm,+xtpr,+tm2,+est,+smx,+vmx,+ds_cpl,+monitor,+dtes64,+pbe,+tm,+ht,+ss,+acpi,+ds,+vme,hv_time,hv_relaxed,hv_vapic,hv_spinlocks=0x1fff,kvm=off -m 4096 -realtime mlock=off -smp 4,sockets=4,cores=1,threads=1 -uuid d4a67adb-5d30-42f8-b8c6-d3c4598700f2 -no-user-config -nodefaults -chardev socket,id=charmonitor,path=/var/lib/libvirt/qemu/win10-box.monitor,server,nowait -mon chardev=charmonitor,id=monitor,mode=control -rtc base=localtim...

From: Martin Peres <martin.peres at labri.fr> This should fix a deadlock that has been reported to us where fan_update() would hold the fan lock and try to grab the alarm_program_lock to reschedule an update. On an other CPU, the alarm_program_lock would have been taken before calling fan_update(), leading to a deadlock. We should Cc: <stable at vger.kernel.org> # 3.9+ Reported-by:

...ercept(struct kvm_vcpu *vcpu) vcpu->arch.kvmi->descriptor.kvm_intercepted = false; } -static unsigned long *msr_mask(struct kvm_vcpu *vcpu, unsigned int *msr) +static unsigned long *msr_mask(struct kvm_vcpu *vcpu, unsigned int *msr, + bool kvmi) { switch (*msr) { case 0 ... 0x1fff: - return vcpu->arch.kvmi->msrw.kvmi_mask.low; + return kvmi ? vcpu->arch.kvmi->msrw.kvmi_mask.low : + vcpu->arch.kvmi->msrw.kvm_mask.low; case 0xc0000000 ... 0xc0001fff: *msr &= 0x1fff; - return vcpu->arch.kvmi->msrw.kvmi_mask.high; + return kvmi ? vcpu...

Hello, while checking new mtu9k-setup, I discovered that ping has some odd behaviour. If I use payloadsize > 4067, every 2nd icmp-echo-request seems to be malformed: ping -s 4068 -D 10.5.49.65 1st: 12:21:09.048447 IP 10.5.49.126 > 10.5.49.65: ICMP echo request, id 46597, seq 0, length 4076 0x0000: 4500 1000 0f2d 4000 4001 a507 0a05 317e 2nd: 12:21:10.052891 IP 10.5.49.126 >