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2017 Jun 27
4
[PATCH v4] nv110/exa: update sched codes
v4: Updated the wait dependancy bars based on tex component masks. This patch adds proper delays to maxwell exa shaders. Tested with rendercheck -f a8r8g8b8. I am still wondering whether the rd's are required. We could still wait on the write bars instead. eg. see "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in exacmnv110.fp Trello: https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> --- src/shader/exac8nv110.fp | 10 +++++----- src/shader/exac8nv110.fpc | 18 +...
2018 Sep 08
0
[PATCH] maxwell,pascal: add scheduling data to shaders
...diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..7537780 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,23 +25,24 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0 wt 0x3f) (st 0xd wr 0x0 wt 0x1) (st 0x1 wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0x2 wr 0x1 rd 0x0 wt 0x3) (st 0x1 wr 0x0 wt 0x1) ipa $r2 a[0x90] $r0 0x0 0x1 tex nodep $r1 $r2 0x0 0x1 t2d 0x8 ipa $r3 a[0x84] $r0...
2017 Jun 10
2
[PATCH v3] nv110/exa: update sched codes
...ons(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..101b67f 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) ipa $r2 a[0x90] $r0 0x0 0x1 tex nodep $r1 $r2 0x0 0x1 t2d 0x8 ipa $r3 a[0x84] $r0...
2017 Jun 28
1
[PATCH v4] nv110/exa: update sched codes
...sks. > > > > This patch adds proper delays to maxwell exa shaders. Tested with > > rendercheck -f a8r8g8b8. > > > > I am still wondering whether the rd's are required. We could > > still wait on the write bars instead. eg. see > > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in > exacmnv110.fp > > > > Trello: > > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-wit > h-proper-delays > > > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > > --- > &g...
2017 Jun 03
2
[PATCH v2] nv110/exa: update sched codes
...ons(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..1c4a4f1 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) ipa $r2 a[0x90] $r0 0x0 0x1 tex nodep $r1 $r2 0x0 0x1 t2d 0x8 ipa $r3 a[0x84] $r0...
2017 Jul 01
2
[PATCH 1/2] nv110/exa: Remove depbars
...hader/videonv110.fpc | 18 ++++++------------ 14 files changed, 36 insertions(+), 69 deletions(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..220d7e5 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -36,12 +36,11 @@ ipa $r3 a[0x84] $r0 0x0 0x1 sched (st 0x0) (st 0x0) (st 0x0) ipa $r2 a[0x80] $r0 0x0 0x1 tex nodep $r0 $r2 0x0 0x0 t2d 0x8 -depbar le 0x5 0x0 0x0 -sched (st 0x0) (st 0x0) (st 0x0) fmul ftz $r3 $r0 $r1 +sched (st 0x0) (st 0x0) (st 0x0) mov $r2 $r3 0xf mov $r1 $r3 0xf -sched (st 0x0) (st 0x0) (st 0x0) mov $r0 $r3 0xf +sc...
2017 Jun 07
2
[PATCH v2] nv110/exa: update sched codes
...gt;> index ce78036..1c4a4f1 100644 >> --- a/src/shader/exac8nv110.fp >> +++ b/src/shader/exac8nv110.fp >> @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { >> }; >> #else >> -sched (st 0x0) (st 0x0) (st 0x0) >> +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) >> ipa pass $r0 a[0x7c] 0x0 0x0 0x1 >> mufu rcp $r0 $r0 >> ipa $r3 a[0x94] $r0 0x0 0x1 >> -sched (st 0x0) (st 0x0) (st 0x0) >> +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt >> 0x2) >> ipa $r2 a[0x90]...
2005 Aug 12
0
ZapHFC E1 PRI (cwain)
Hello, I've got a Junghanns ZapHFC E1 PRI Card (cwain) and this driver writes very much messages into /var/log/messages like the following: --- snip --- Aug 2 17:58:02 asterisk1 kernel: cwain: card 1 RX [ 0x2 0x1 0x1 0x37 0x90 0xc3 ] 6 bytes Aug 2 17:58:02 asterisk1 kernel: cwain: card 1 TX [ 0x2 0x1 0x1 0xef ] Aug 2 17:58:02 asterisk1 kernel: ztx 4 bytes Aug 2 17:58:12 asterisk1 kernel: cwain: card 1 RX [ 0x2 0x1 0x1 0x37 0x90 0xc3 ] 6 bytes Aug 2 17:58:12 asterisk1 kernel: cwain: card 1 TX [ 0x2 0x1 0...
2017 Jul 01
0
[PATCH v5 2/2] nv110/exa: update sched codes
...ons(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index 220d7e5..7797ef4 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,22 +25,22 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 wt 0x3) (st 0xf wr 0x0 wt 0x1) ipa $r2 a[0x90] $r0 0x0 0x1 tex nodep $r1 $r2 0x0 0x1 t2d 0x8 ipa $r3 a[0x84] $r0 0x0 0x...
2017 Jun 29
0
[PATCH v4] nv110/exa: update sched codes
...cy bars based on tex component masks. > > This patch adds proper delays to maxwell exa shaders. Tested with > rendercheck -f a8r8g8b8. > > I am still wondering whether the rd's are required. We could > still wait on the write bars instead. eg. see > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in exacmnv110.fp > > Trello: > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > --- > src/shader/exac8nv110.fp | 10 +++++---...
2017 Jun 28
0
[PATCH v4] nv110/exa: update sched codes
...ancy bars based on tex component masks. > > This patch adds proper delays to maxwell exa shaders. Tested with > rendercheck -f a8r8g8b8. > > I am still wondering whether the rd's are required. We could > still wait on the write bars instead. eg. see > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in exacmnv110.fp > > Trello: > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > --- > src/shader/exac8nv110.fp | 10 +++++-----...
2017 Jun 10
0
[PATCH v3] nv110/exa: update sched codes
...fp b/src/shader/exac8nv110.fp > index ce78036..101b67f 100644 > --- a/src/shader/exac8nv110.fp > +++ b/src/shader/exac8nv110.fp > @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { > }; > #else > > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) > ipa pass $r0 a[0x7c] 0x0 0x0 0x1 > mufu rcp $r0 $r0 > ipa $r3 a[0x94] $r0 0x0 0x1 > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) > ipa $r2 a[0x90] $r0 0x0 0x1 > tex nodep $r1 $r2 0...
2017 Jun 03
0
[PATCH] nv110/exa: update sched codes
...ons(-) diff --git a/src/shader/exac8nv110.fp b/src/shader/exac8nv110.fp index ce78036..1c4a4f1 100644 --- a/src/shader/exac8nv110.fp +++ b/src/shader/exac8nv110.fp @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { }; #else -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) ipa pass $r0 a[0x7c] 0x0 0x0 0x1 mufu rcp $r0 $r0 ipa $r3 a[0x94] $r0 0x0 0x1 -sched (st 0x0) (st 0x0) (st 0x0) +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) ipa $r2 a[0x90] $r0 0x0 0x1 tex nodep $r1 $r2 0x0 0x1 t2d 0x8 ipa $r3 a[0x84] $r0...
2017 Jun 08
1
[PATCH v2] nv110/exa: update sched codes
...a/src/shader/exac8nv110.fp >> +++ b/src/shader/exac8nv110.fp >> @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { >> }; >> #else >> -sched (st 0x0) (st 0x0) (st 0x0) >> +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt >> 0x1) >> ipa pass $r0 a[0x7c] 0x0 0x0 0x1 >> mufu rcp $r0 $r0 >> ipa $r3 a[0x94] $r0 0x0 0x1 >> -sched (st 0x0) (st 0x0) (st 0x0) >> +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf...
2017 Jun 12
2
[PATCH v3] nv110/exa: update sched codes
On 06/10/2017 09:14 AM, Aaryaman Vasishta wrote: > See the 'wt' on the first fmul in exacanv110.fp, exacmnv110.fp and > exasanv110.fp. Any ideas on what could be causing the first fmul to > require $r0 and/or $r1? 'tex nodep $r4 $r2 0x0 0x1 t2d 0xf' is actually: 'tex nodep $r4:$r7 $r2 0x0 0x1 t2d 0xf' Very confusing, I know. > > Cheers, > Aaryaman > > On Sat, Jun 10, 2017 at 4:10 PM, Aaryaman Vasishta > <jem456.vasishta at gmail.com <mailto:jem456.vasishta at gmail.com>> wrote: > &g...
2017 Jun 05
0
[PATCH v2] nv110/exa: update sched codes
...src/shader/exac8nv110.fp > index ce78036..1c4a4f1 100644 > --- a/src/shader/exac8nv110.fp > +++ b/src/shader/exac8nv110.fp > @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { > }; > #else > > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) > ipa pass $r0 a[0x7c] 0x0 0x0 0x1 > mufu rcp $r0 $r0 > ipa $r3 a[0x94] $r0 0x0 0x1 > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr 0x1 wt 0x2) > ipa $r2 a[0x90] $r0 0x0 0x1 > tex nodep $r1...
2017 Jun 07
0
[PATCH v2] nv110/exa: update sched codes
...100644 > --- a/src/shader/exac8nv110.fp > +++ b/src/shader/exac8nv110.fp > @@ -25,23 +25,23 @@ NV110FP_Composite_A8[] = { > }; > #else > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x0) (st 0xd wr 0x0 wt 0x1) (st 0xf wr 0x0 wt 0x1) > ipa pass $r0 a[0x7c] 0x0 0x0 0x1 > mufu rcp $r0 $r0 > ipa $r3 a[0x94] $r0 0x0 0x1 > -sched (st 0x0) (st 0x0) (st 0x0) > +sched (st 0xf wr 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x3) (st 0xf wr > 0x1 wt 0x2)...
2010 Jun 17
3
FictionBook Editor work problems
...e installed FBE (http://code.google.com/p/fictionbookeditor) in wine then run Code: winetricks msxml4 vcrun2008 ie6 comctl32 but still have many errors in terminal console Code: kontiky at Dolphin:~/.wine/drive_c/Program Files/FictionBook Editor$ ./FBE.exe fixme:ntoskrnl:KeInitializeMutex stub: 0x110fd0, 0 fixme:ntoskrnl:KeInitializeMutex stub: 0x110ff8, 0 fixme:ntoskrnl:IoRegisterShutdownNotification stub: 0x110ee0 fixme:ntoskrnl:KeInitializeEvent stub: 0x110fa8 1 0 fixme:ntoskrnl:KeInitializeEvent stub: 0x110fb8 1 0 fixme:ntoskrnl:KeInitializeSpinLock stub: 0x110fa0 fixme:ntoskrnl:ObReferen...
2011 Sep 19
10
Few Questions
First of all, I am very mac illiterate as I have been using windows all my life. I am enquiring to see about getting some help on the whole wine thing. I have been looking at the wiki and FAQs but Im lost. I installed wine from sourceforge but when I go to click wineinstall in the tools folder, this is what I get: Last login: Sun Sep 18 21:31:41 on ttys000
2015 Nov 25
4
NV50 compute support questions
...0000 (4, 0)[0]: got 0xdeadbeef/-6259853398707798016.000000, expected 0x4/0.000000 (5, 0)[0]: got 0xdeadbeef/-6259853398707798016.000000, expected 0x3/0.000000 (6, 0)[0]: got 0xdeadbeef/-6259853398707798016.000000, expected 0x5/0.000000 (7, 0)[0]: got 0xdeadbeef/-6259853398707798016.000000, expected 0x1/0.000000 (8, 0)[0]: got 0xdeadbeef/-6259853398707798016.000000, expected 0x5/0.000000 (9, 0)[0]: got 0xdeadbeef/-6259853398707798016.000000, expected 0x4/0.000000 (10, 0)[0]: got 0xdeadbeef/-6259853398707798016.000000, expected 0x1/0.000000 (11, 0)[0]: got 0xdeadbeef/-6259853398707798016.000000, ex...