search for: 0x060

...- virtio-mmio.orig 2011-10-24 11:17:08.263907000 +0100 +++ virtio-mmio.tex 2011-10-24 13:58:29.752757000 +0100 @@ -59,9 +59,18 @@ \item 0x050 | W | QueueNotify \\ Queue notifier.\\ Writing a queue index to this register notifies the Host that there are new buffers to process in the queue. -\item 0x060 | W | InterruptACK \\ +\item 0x060 | R | InterruptStatus \\ +Interrupt status. \\ +Reading from this register returns a bit mask of interrupts asserted by the device. An interrupt is asserted if the corresponding bit is set, ie. equals one (1). \\ +\begin{itemize} +\item Bit 0 | Used Ring update \\...

...- virtio-mmio.orig 2011-10-24 11:17:08.263907000 +0100 +++ virtio-mmio.tex 2011-10-24 13:58:29.752757000 +0100 @@ -59,9 +59,18 @@ \item 0x050 | W | QueueNotify \\ Queue notifier.\\ Writing a queue index to this register notifies the Host that there are new buffers to process in the queue. -\item 0x060 | W | InterruptACK \\ +\item 0x060 | R | InterruptStatus \\ +Interrupt status. \\ +Reading from this register returns a bit mask of interrupts asserted by the device. An interrupt is asserted if the corresponding bit is set, ie. equals one (1). \\ +\begin{itemize} +\item Bit 0 | Used Ring update \\...

...*/ > > > +#define VIRTIO_MDEV_QUEUE_ALIGN 0x048 > > > + > > > +/* Queue notifier - Write Only */ > > > +#define VIRTIO_MDEV_QUEUE_NOTIFY 0x050 > > > + > > > +/* Device status register - Read Write */ > > > +#define VIRTIO_MDEV_STATUS 0x060 > > > + > > > +/* Selected queue's Descriptor Table address, 64 bits in two halves */ > > > +#define VIRTIO_MDEV_QUEUE_DESC_LOW 0x080 > > > +#define VIRTIO_MDEV_QUEUE_DESC_HIGH 0x084 > > > + > > > +/* Selected queue's Available Ring addr...

...*/ > > > +#define VIRTIO_MDEV_QUEUE_ALIGN 0x048 > > > + > > > +/* Queue notifier - Write Only */ > > > +#define VIRTIO_MDEV_QUEUE_NOTIFY 0x050 > > > + > > > +/* Device status register - Read Write */ > > > +#define VIRTIO_MDEV_STATUS 0x060 > > > + > > > +/* Selected queue's Descriptor Table address, 64 bits in two halves */ > > > +#define VIRTIO_MDEV_QUEUE_DESC_LOW 0x080 > > > +#define VIRTIO_MDEV_QUEUE_DESC_HIGH 0x084 > > > + > > > +/* Selected queue's Available Ring addr...

...gt; +/* Alignment of virtqueue - Read Only */ >> +#define VIRTIO_MDEV_QUEUE_ALIGN 0x048 >> + >> +/* Queue notifier - Write Only */ >> +#define VIRTIO_MDEV_QUEUE_NOTIFY 0x050 >> + >> +/* Device status register - Read Write */ >> +#define VIRTIO_MDEV_STATUS 0x060 >> + >> +/* Selected queue's Descriptor Table address, 64 bits in two halves */ >> +#define VIRTIO_MDEV_QUEUE_DESC_LOW 0x080 >> +#define VIRTIO_MDEV_QUEUE_DESC_HIGH 0x084 >> + >> +/* Selected queue's Available Ring address, 64 bits in two halves */ >&g...

..._QUEUE_READY 0x044 > + > +/* Alignment of virtqueue - Read Only */ > +#define VIRTIO_MDEV_QUEUE_ALIGN 0x048 > + > +/* Queue notifier - Write Only */ > +#define VIRTIO_MDEV_QUEUE_NOTIFY 0x050 > + > +/* Device status register - Read Write */ > +#define VIRTIO_MDEV_STATUS 0x060 > + > +/* Selected queue's Descriptor Table address, 64 bits in two halves */ > +#define VIRTIO_MDEV_QUEUE_DESC_LOW 0x080 > +#define VIRTIO_MDEV_QUEUE_DESC_HIGH 0x084 > + > +/* Selected queue's Available Ring address, 64 bits in two halves */ > +#define VIRTIO_MDEV_QUEU...

..._QUEUE_READY 0x044 > + > +/* Alignment of virtqueue - Read Only */ > +#define VIRTIO_MDEV_QUEUE_ALIGN 0x048 > + > +/* Queue notifier - Write Only */ > +#define VIRTIO_MDEV_QUEUE_NOTIFY 0x050 > + > +/* Device status register - Read Write */ > +#define VIRTIO_MDEV_STATUS 0x060 > + > +/* Selected queue's Descriptor Table address, 64 bits in two halves */ > +#define VIRTIO_MDEV_QUEUE_DESC_LOW 0x080 > +#define VIRTIO_MDEV_QUEUE_DESC_HIGH 0x084 > + > +/* Selected queue's Available Ring address, 64 bits in two halves */ > +#define VIRTIO_MDEV_QUEU...

...t;> +#define VIRTIO_MDEV_QUEUE_ALIGN 0x048 >>>> + >>>> +/* Queue notifier - Write Only */ >>>> +#define VIRTIO_MDEV_QUEUE_NOTIFY 0x050 >>>> + >>>> +/* Device status register - Read Write */ >>>> +#define VIRTIO_MDEV_STATUS 0x060 >>>> + >>>> +/* Selected queue's Descriptor Table address, 64 bits in two halves */ >>>> +#define VIRTIO_MDEV_QUEUE_DESC_LOW 0x080 >>>> +#define VIRTIO_MDEV_QUEUE_DESC_HIGH 0x084 >>>> + >>>> +/* Selected queue's Availab...

...s same as started? > + > +/* Alignment of virtqueue - Read Only */ > +#define VIRTIO_MDEV_QUEUE_ALIGN 0x048 > + > +/* Queue notifier - Write Only */ > +#define VIRTIO_MDEV_QUEUE_NOTIFY 0x050 > + > +/* Device status register - Read Write */ > +#define VIRTIO_MDEV_STATUS 0x060 > + > +/* Selected queue's Descriptor Table address, 64 bits in two halves */ > +#define VIRTIO_MDEV_QUEUE_DESC_LOW 0x080 > +#define VIRTIO_MDEV_QUEUE_DESC_HIGH 0x084 > + > +/* Selected queue's Available Ring address, 64 bits in two halves */ > +#define VIRTIO_MDEV_QUEU...

...s same as started? > + > +/* Alignment of virtqueue - Read Only */ > +#define VIRTIO_MDEV_QUEUE_ALIGN 0x048 > + > +/* Queue notifier - Write Only */ > +#define VIRTIO_MDEV_QUEUE_NOTIFY 0x050 > + > +/* Device status register - Read Write */ > +#define VIRTIO_MDEV_STATUS 0x060 > + > +/* Selected queue's Descriptor Table address, 64 bits in two halves */ > +#define VIRTIO_MDEV_QUEUE_DESC_LOW 0x080 > +#define VIRTIO_MDEV_QUEUE_DESC_HIGH 0x084 > + > +/* Selected queue's Available Ring address, 64 bits in two halves */ > +#define VIRTIO_MDEV_QUEU...

This is enough to enable tessellation support on nvc0. It seems to work a lot better on my GF108 than GK208. I suspect that there's some sort of scheduling shenanigans that need to be adjusted for kepler+. Or perhaps some shader header things. Even with the GF108, I still get occasional blue triangles in Heaven, but I get a *ton* of them on the GK208 -- seemingly the same issue, but it's

...gt; > > > > + > > > > > +/* Queue notifier - Write Only */ > > > > > +#define VIRTIO_MDEV_QUEUE_NOTIFY 0x050 > > > > > + > > > > > +/* Device status register - Read Write */ > > > > > +#define VIRTIO_MDEV_STATUS 0x060 > > > > > + > > > > > +/* Selected queue's Descriptor Table address, 64 bits in two halves */ > > > > > +#define VIRTIO_MDEV_QUEUE_DESC_LOW 0x080 > > > > > +#define VIRTIO_MDEV_QUEUE_DESC_HIGH 0x084 > > > > > + > >...

...00 7C 89 E6 06 57 52 8E 0x010: C0 FB FC BF 00 06 B9 00 01 F3 A5 EA 20 06 00 00 0x020: 52 B4 41 BB AA 55 31 C9 30 F6 F9 CD 13 72 13 81 0x030: FB 55 AA 75 0D D1 E9 73 09 66 C7 06 8D 06 B4 42 0x040: EB 15 5A B4 08 CD 13 83 E1 3F 51 0F B6 C6 40 F7 0x050: E1 52 50 66 31 C0 66 99 E8 66 00 E8 21 01 4D 69 0x060: 73 73 69 6E 67 20 6F 70 65 72 61 74 69 6E 67 20 0x070: 73 79 73 74 65 6D 2E 0D 0A 66 60 66 31 D2 BB 00 0x080: 7C 66 52 66 50 06 53 6A 01 6A 10 89 E6 66 F7 36 0x090: F4 7B C0 E4 06 88 E1 88 C5 92 F6 36 F8 7B 88 C6 0x0A0: 08 E1 41 B8 01 02 8A 16 FA 7B CD 13 8D 64 10 66 0x0B0: 61 C3 E8 C4 FF BE BE 7D...

This patch-series implements the ARB_viewport_array for nvc0 and does a little house-cleanig afterwords. V2: Add Release-Notes, mark this in GL3 as done for nvc0 Don't mark the scissors dirty when we don't need to do that Tobias Klausmann (3): nvc0: implement multiple viewports/scissors, enable ARB_viewport_array docs: update GL3.txt, relnotes: mark GL_ARB_viewport_array as done

...gt; +/* Alignment of virtqueue - Read Only */ >> +#define VIRTIO_MDEV_QUEUE_ALIGN 0x048 >> + >> +/* Queue notifier - Write Only */ >> +#define VIRTIO_MDEV_QUEUE_NOTIFY 0x050 >> + >> +/* Device status register - Read Write */ >> +#define VIRTIO_MDEV_STATUS 0x060 >> + >> +/* Selected queue's Descriptor Table address, 64 bits in two halves */ >> +#define VIRTIO_MDEV_QUEUE_DESC_LOW 0x080 >> +#define VIRTIO_MDEV_QUEUE_DESC_HIGH 0x084 >> + >> +/* Selected queue's Available Ring address, 64 bits in two halves */ >&g...

...a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c @@ -64,7 +64,7 @@ nvc0_shader_output_address(unsigned sn, unsigned si, unsigned ubase) case NV50_SEMANTIC_TESSFACTOR: return 0x000 + si * 0x4; case TGSI_SEMANTIC_PRIMID: return 0x060; case TGSI_SEMANTIC_LAYER: return 0x064; - case NV50_SEMANTIC_VIEWPORTINDEX: return 0x068; + case TGSI_SEMANTIC_VIEWPORT_INDEX:return 0x068; case TGSI_SEMANTIC_PSIZE: return 0x06c; case TGSI_SEMANTIC_POSITION: return 0x070; case TGSI_SEMANTIC_GENERIC:...

...a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c @@ -64,7 +64,7 @@ nvc0_shader_output_address(unsigned sn, unsigned si, unsigned ubase) case NV50_SEMANTIC_TESSFACTOR: return 0x000 + si * 0x4; case TGSI_SEMANTIC_PRIMID: return 0x060; case TGSI_SEMANTIC_LAYER: return 0x064; - case NV50_SEMANTIC_VIEWPORTINDEX: return 0x068; + case TGSI_SEMANTIC_VIEWPORT_INDEX:return 0x068; case TGSI_SEMANTIC_PSIZE: return 0x06c; case TGSI_SEMANTIC_POSITION: return 0x070; case TGSI_SEMANTIC_GENERIC:...

...VIRTIO_MMIO_QUEUE_PFN 0x040 + +#endif + + +/* Ready bit for the currently selected queue - Read Write */ +#define VIRTIO_MMIO_QUEUE_READY 0x044 + +/* Queue notifier - Write Only */ +#define VIRTIO_MMIO_QUEUE_NOTIFY 0x050 + +/* Interrupt status - Read Only */ +#define VIRTIO_MMIO_INTERRUPT_STATUS 0x060 + +/* Interrupt acknowledge - Write Only */ +#define VIRTIO_MMIO_INTERRUPT_ACK 0x064 + +/* Device status register - Read Write */ +#define VIRTIO_MMIO_STATUS 0x070 + +/* Selected queue's Descriptor Table address, 64 bits in two halves */ +#define VIRTIO_MMIO_QUEUE_DESC_LOW 0x080 +#define VIRTI...

...VIRTIO_MMIO_QUEUE_PFN 0x040 + +#endif + + +/* Ready bit for the currently selected queue - Read Write */ +#define VIRTIO_MMIO_QUEUE_READY 0x044 + +/* Queue notifier - Write Only */ +#define VIRTIO_MMIO_QUEUE_NOTIFY 0x050 + +/* Interrupt status - Read Only */ +#define VIRTIO_MMIO_INTERRUPT_STATUS 0x060 + +/* Interrupt acknowledge - Write Only */ +#define VIRTIO_MMIO_INTERRUPT_ACK 0x064 + +/* Device status register - Read Write */ +#define VIRTIO_MMIO_STATUS 0x070 + +/* Selected queue's Descriptor Table address, 64 bits in two halves */ +#define VIRTIO_MMIO_QUEUE_DESC_LOW 0x080 +#define VIRTI...

This patch-series implements the ARB_viewport_array for nvc0 and does a little house-cleanig afterwords. Tobias Klausmann (3): nvc0: implement multiple viewports/scissors, enable ARB_viewport_array nvc0: mark scissor in nvc0_clear_{} nv50/ir: Remove NV50_SEMANTIC_VIEWPORTINDEX and its last consumer .../drivers/nouveau/codegen/nv50_ir_driver.h | 1 -