search for: 0x0000ffff

...009ffff (0xa0000) MX[B] [16] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [17] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [18] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [19] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [20] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [21] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [22] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [23] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [24] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [25] -1 0 0x00000000...

--- celt/arch.h | 5 +++++ silk/macros.h | 4 +--- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/celt/arch.h b/celt/arch.h index 9f74ddd..670527b 100644 --- a/celt/arch.h +++ b/celt/arch.h @@ -78,6 +78,11 @@ static OPUS_INLINE void _celt_fatal(const char *str, const char *file, int line) #define UADD32(a,b) ((a)+(b)) #define USUB32(a,b) ((a)-(b)) +/* Set this if opus_int64

...000c0000 - 0x000effff (0x30000) MX[B] [11] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [12] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [13] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [14] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [15] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [16] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [17] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [18] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [19] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [20] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [21] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [22] -1 0 0x0000ffff - 0x0000ffff (0x1...

OK, here it is. Benchmarks still coming. This is against Andi's 2.6.18-rc7-git3 tree, and replaces the patches between (and not including) i386-pda-asm-offsets and i386-early-fault. One patch is identical, one is mildly modified, the rest are re-implemented but inspired by Jeremy's PDA work. Thanks, Rusty. -- Help! Save Australia from the worst of the DMCA: http://linux.org.au/law

OK, here it is. Benchmarks still coming. This is against Andi's 2.6.18-rc7-git3 tree, and replaces the patches between (and not including) i386-pda-asm-offsets and i386-early-fault. One patch is identical, one is mildly modified, the rest are re-implemented but inspired by Jeremy's PDA work. Thanks, Rusty. -- Help! Save Australia from the worst of the DMCA: http://linux.org.au/law

...6)(b)) /** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 bits */ +#if OPUS_FAST_INT64 +#define MULT16_32_Q16(a,b) ((opus_val32)SHR((opus_int64)((opus_val16)(a))*(b),16)) +#else #define MULT16_32_Q16(a,b) ADD32(MULT16_16((a),SHR((b),16)), SHR(MULT16_16SU((a),((b)&0x0000ffff)),16)) +#endif /** 16x32 multiplication, followed by a 16-bit shift right (round-to-nearest). Results fits in 32 bits */ +#if OPUS_FAST_INT64 +#define MULT16_32_P16(a,b) ((opus_val32)PSHR((opus_int64)((opus_val16)(a))*(b),16)) +#else #define MULT16_32_P16(a,b) ADD32(MULT16_16((a),SHR((b),16)),...

...6b,5811 rev 81 class 0c,00,10 hdr 00 (II) PCI: 20:0f:0: chip 106b,0032 card 0000,0000 rev 80 class 02,00,00 hdr 00 (II) PCI: End of PCI scan (II) Host-to-PCI bridge: (II) Bus 0: bridge is at (0:11:0), (0,0,32), BCTRL: 0x0008 (VGA_EN is set) (II) Bus 0 I/O range: [0] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B] (II) Bus 0 non-prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] (II) Bus 0 prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] (II) Host-to-PCI bridge: (II) Bus 16: bridge is at (16:11:0), (16,16,32), BCTRL: 0x...

...000c0000 - 0x000effff (0x30000) MX[B] [31] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [32] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [33] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [34] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [35] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [36] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [37] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [38] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [39] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [40] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [41] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [42] -1 0 0x0000ffff - 0x0000ffff (0x1...

...0000,0000 rev 00 class 00,00,00 hdr 00 (II) PCI: 00:0f:0: chip 5333,8901 card 0000,0000 rev 04 class 03,00,00 hdr 00 (II) PCI: End of PCI scan (II) Host-to-PCI bridge: (II) Bus 0: bridge is at (0:0:0), (0,0,0), BCTRL: 0x0008 (VGA_EN is set) (II) Bus 0 I/O range: [0] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B] (II) Bus 0 non-prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] (II) Bus 0 prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] (II) PCI-to-ISA bridge: (II) Bus -1: bridge is at (0:7:0), (0,-1,-1), BCTRL: 0x0008...

...04,00,00 hdr 80 (II) PCI: 03:0b:1: chip 109e,0878 card aa03,1463 rev 11 class 04,80,00 hdr 80 (II) PCI: End of PCI scan (II) Intel Bridge workaround enabled (II) Host-to-PCI bridge: (II) Bus 0: bridge is at (0:0:0), (0,0,3), BCTRL: 0x0008 (VGA_EN is set) (II) Bus 0 I/O range: [0] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B] (II) Bus 0 non-prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] (II) Bus 0 prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] (II) Subtractive PCI-to-PCI bridge: (II) Bus 2: bridge is at (0:30:0), (0,2,3), BCTRL: 0x0404 (VGA_EN is cleare...

...ec.c index 330d72b1a4af..52412965fac1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c @@ -324,7 +324,7 @@ nvkm_gsp_fwsec_sb(struct nvkm_gsp *gsp) return ret; /* Verify. */ - err = nvkm_rd32(device, 0x001400 + (0xf * 4)) & 0x0000ffff; + err = nvkm_rd32(device, 0x001400 + (0x15 * 4)) & 0x0000ffff; if (err) { nvkm_error(subdev, "fwsec-sb: 0x%04x\n", err); return -EIO; -- 2.45.2

...fined(__x86_64__) || defined(__LP64__) || defined(_WIN64) +#if OPUS_FAST_INT64 #define silk_SMULWB(a32, b32) (((a32) * (opus_int64)((opus_int16)(b32))) >> 16) #else #define silk_SMULWB(a32, b32) ((((a32) >> 16) * (opus_int32)((opus_int16)(b32))) + ((((a32) & 0x0000FFFF) * (opus_int32)((opus_int16)(b32))) >> 16)) #endif /* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit int */ -#if defined(__x86_64__) || defined(__LP64__) || defined(_WIN64) +#if OPUS_FAST_INT64 #define silk_SMLAWB(a32, b32, c32) ((a32) + (((b32) *...

...BCTRL: 0x000a (VGA_EN is set) (II) Bus 1 non-prefetchable memory range: [0] -1 0 0xb0000000 - 0xcfffffff (0x20000000) MX[B] (II) Host-to-PCI bridge: (II) Bus 0: bridge is at (0:24:0), (0,0,5), BCTRL: 0x0008 (VGA_EN is set) (II) Bus 0 I/O range: [0] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B] (II) Bus 0 non-prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x100000000) MX[B] (II) Bus 0 prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x100000000) MX[B] (II) Host-to-PCI bridge: (II) Bus -1: bridge is at (0:24:1), (-1,...

...009ffff (0xa0000) MX[B] [16] -1 0 0xffffffff - 0xffffffff (0x1) MX[B] [17] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [18] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [19] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [20] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [21] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [22] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [23] -1 0 0x00000000 - 0x00000000 (0x1) IX[B] [24] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [25] -1 0 0x00000000...

--- configure.ac | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/configure.ac b/configure.ac index f52d2c2..e1a6e9b 100644 --- a/configure.ac +++ b/configure.ac @@ -190,7 +190,7 @@ AC_ARG_ENABLE([rtcd], [enable_rtcd=yes]) AC_ARG_ENABLE([intrinsics], - [AS_HELP_STRING([--disable-intrinsics], [Disable intrinsics optimizations for ARM(float) X86(fixed)])],, +

...GM107_TIC2_1_GOB_DEPTH_OFFSET__SHIFT 5 +#define GM107_TIC2_1_ADDRESS_BITS_31_TO_9__MASK 0xfffffe00 +#define GM107_TIC2_1_ADDRESS_BITS_31_TO_9__SHIFT 9 +#define GM107_TIC2_1_ADDRESS_BITS_31_TO_9__SHR 9 + +#define GM107_TIC2_2 0x00000008 +#define GM107_TIC2_2_ADDRESS_BITS_47_TO_32__MASK 0x0000ffff +#define GM107_TIC2_2_ADDRESS_BITS_47_TO_32__SHIFT 0 +#define GM107_TIC2_2_HEADER_VERSION__MASK 0x00e00000 +#define GM107_TIC2_2_HEADER_VERSION__SHIFT 21 +#define GM107_TIC2_2_HEADER_VERSION_ONE_D_BUFFER 0x00000000 +#define GM107_TIC2_2_HEADER_VERSION_PITCH_COLORKEY 0x00200000 +#define GM107...

...->inst, i + 0, 0x10700ff9); - nvkm_wo32(chan->inst, i + 1, 0x0436086c); - nvkm_wo32(chan->inst, i + 2, 0x000c001b); + nvkm_wo32(chan->inst, i + 4, 0x0436086c); + nvkm_wo32(chan->inst, i + 8, 0x000c001b); } for (i = 0x30b8; i < 0x30c8; i += 4) nvkm_wo32(chan->inst, i, 0x0000ffff); diff --git a/drm/nouveau/nvkm/engine/gr/nv34.c b/drm/nouveau/nvkm/engine/gr/nv34.c index 2207dac..300f5ed 100644 --- a/drm/nouveau/nvkm/engine/gr/nv34.c +++ b/drm/nouveau/nvkm/engine/gr/nv34.c @@ -75,8 +75,8 @@ nv34_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, nvkm_wo32(cha...

...08,05,01 hdr 80 (II) PCI: 03:03:0: chip 8086,4220 card 8086,2721 rev 05 class 02,80,00 hdr 00 (II) PCI: End of PCI scan (II) Intel Bridge workaround enabled (II) Host-to-PCI bridge: (II) Bus 0: bridge is at (0:0:0), (0,0,4), BCTRL: 0x0008 (VGA_EN is set) (II) Bus 0 I/O range: [0] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[b] (II) Bus 0 non-prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[b] (II) Bus 0 prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[b] (II) PCI-to-PCI bridge: (II) Bus 1: bridge is at (0:1:0), (0,1,1), BCTRL: 0x000a (VGA_EN is set) (II) Bus 1 non-p...

...= 0 10530: _exit(30) 10529: Received signal #18, SIGCLD, in write() [caught] 10529: siginfo: SIGCLD CLD_EXITED pid=10530 status=0x001E 10529: write(1, " r e c v _ f i l e _ n a".., 42) Err#4 EINTR 10529: lwp_sigmask(SIG_SETMASK, 0x00020000, 0x00000000) = 0xFFBFFEFF [0x0000FFFF] 10529: waitid(P_ALL, 0, 0x08045220, WEXITED|WTRAPPED|WNOHANG) = 0 10529: waitid(P_ALL, 0, 0x08045220, WEXITED|WTRAPPED|WNOHANG) Err#10 ECHILD 10529: setcontext(0x08045110) 10529: pollsys(0x08045D80, 1, 0x08045E10, 0x00000000) = 1 10529: read(7, " (\0\0\t", 4)...

...ub fixme:d3d9:D3DPERF_SetMarker (color 0xffffffff, name L"Binding Vertex Shader: LitTexture2Haircap_Skin[0]") : stub fixme:d3d_shader:shader_sm4_read_comment ptr 0x32f4cc, comment 0x32f4c8, comment_size 0x32f4c4 stub! fixme:d3d_shader:shader_sm4_read_opcode Unrecognized opcode 0xff, token 0x0000ffff fixme:d3d_shader:shader_sm4_read_comment ptr 0x32f4cc, comment 0x32f4c8, comment_size 0x32f4c4 stub! fixme:d3d_shader:shader_sm4_read_opcode Unrecognized opcode 0xff, token 0x0000ffff fixme:d3d_shader:shader_sm4_read_comment ptr 0x32f4cc, comment 0x32f4c8, comment_size 0x32f4c4 stub! fixme:d3d_shad...