Displaying 6 results from an estimated 6 matches for "0x000001c0".
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0x00000100
2007 Sep 03
4
Fixes and workarounds for regressions and issues in the randr-1.2 branch
Hi,
Please find attached the patches which I currently use on my desktop
machine for dual head with the randr branch to fix the issues which I found.
They may help others as well but may e.g. also disable the Xv blitter
which might be working for some (but didn't on my card) - more information
is found in the text comments in the patches.
I have to hurry so this is short, will be back.
2007 Aug 06
3
[Bug 11868] New: Starting X for the second time fails (without reloading drm modules)
...:11:46 localhost [drm:nouveau_gpuobj_dma_new] Creating PCI DMA object
using virtual zone starting at 0x3c1000, size 32
Aug 6 21:11:46 localhost [drm:nouveau_gpuobj_ref_add] ch1 h=0xd8000003
gpuobj=ffff8100235a0a40
Aug 6 21:11:46 localhost [drm:nouveau_ramht_hash_handle] ch1 handle=0x00000000
hash=0x000001c0
Aug 6 21:11:46 localhost [drm:nouveau_ramht_insert] insert ch1 0x000001c0:
h=0xd8000003, c=0x00804c10
Aug 6 21:11:46 localhost [drm:drm_unlocked_ioctl] pid=6567, cmd=0x400c6445,
nr=0x45, dev 0xe200, auth=1
Aug 6 21:11:46 localhost [drm:nouveau_gpuobj_gr_new] ch1 class=0x0062
Aug 6 21:11:46 loca...
2016 Feb 15
24
[PATCH 01/23] nv50: import updated g80_defs.xml.h from rnndb
From: Ben Skeggs <bskeggs at redhat.com>
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
src/gallium/drivers/nouveau/nv50/g80_defs.xml.h | 279 ++++++++++++++++++++++++
1 file changed, 279 insertions(+)
create mode 100644 src/gallium/drivers/nouveau/nv50/g80_defs.xml.h
diff --git a/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h
2016 Oct 16
10
[PATCH 1/5] hwdefs: update nvc0_3d, add gm107_texture for new TIC format
...ine GM107_TIC2_3_GOBS_PER_BLOCK_HEIGHT_FOUR 0x00000010
+#define GM107_TIC2_3_GOBS_PER_BLOCK_HEIGHT_EIGHT 0x00000018
+#define GM107_TIC2_3_GOBS_PER_BLOCK_HEIGHT_SIXTEEN 0x00000020
+#define GM107_TIC2_3_GOBS_PER_BLOCK_HEIGHT_THIRTYTWO 0x00000028
+#define GM107_TIC2_3_GOBS_PER_BLOCK_DEPTH__MASK 0x000001c0
+#define GM107_TIC2_3_GOBS_PER_BLOCK_DEPTH__SHIFT 6
+#define GM107_TIC2_3_GOBS_PER_BLOCK_DEPTH_ONE 0x00000000
+#define GM107_TIC2_3_GOBS_PER_BLOCK_DEPTH_TWO 0x00000040
+#define GM107_TIC2_3_GOBS_PER_BLOCK_DEPTH_FOUR 0x00000080
+#define GM107_TIC2_3_GOBS_PER_BLOCK_DEPTH_EIGHT 0x000000c0
+#d...
2014 Dec 31
2
[PATCH 1/2] nv50: regenerate rnndb headers
...-#define NV50_3D_DMA_ZETA 0x00000184
+#define NV50_3D_DMA_ZETA 0x00000184
#define NV50_3D_DMA_QUERY 0x00000188
@@ -101,7 +101,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NV50_3D_DMA_CLIPID 0x000001ac
#define NV50_3D_DMA_COLOR(i0) (0x000001c0 + 0x4*(i0))
-#define NV50_3D_DMA_COLOR__ESIZE 0x00000004
+#define NV50_3D_DMA_COLOR__ESIZE 0x00000004
#define NV50_3D_DMA_COLOR__LEN 0x00000008
#define NV50_3D_RT(i0) (0x00000200 + 0x20*(i0))
@@ -114,7 +114,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWAR...
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
I believe I've addressed all the feedback from the first time around, and
also made fixes necessary for GM20x based on testing results. I believe
now it should actually work for all GM10x and GM20x. Further, GP10x should
be very easy to add, but without someone to actually test I didn't want to
claim support for it.
Ilia Mirkin (7):
exa: add GM10x acceleration support
hwdefs: update