search for: 0x0000000f

Displaying 20 results from an estimated 59 matches for "0x0000000f".

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2017 Nov 15
2
[PATCH] nouveau/codegen: dump tgsi floats as hex values
...thing to have! That would include patching the output and the tgsi parser (who wants to delete half the output to parse it again e.g. with nouveau_compiler). I can image an output similar to the one below: IMM[5] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} ^ IMM[5] FLT32 {0x00000019, 0x0000000f, 0x00000005, 0x0000001e} IMM[6] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} = IMM[6] FLT32 {0x0000001e, 0x00000005, 0x0000000a, 0x00000014} IMM[7] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} IMM[7] FLT32 {0x00000014, 0x0000000a, 0x0000000f, 0x00000019} Greetings, Tobias...
2017 Nov 14
3
[PATCH] nouveau/codegen: dump tgsi floats as hex values
...are not exactly zero: IMM[5] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} IMM[6] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} IMM[7] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} when printing the values as hex, we can now see the differences: IMM[5] FLT32 {0x00000019, 0x0000000f, 0x00000005, 0x0000001e} IMM[6] FLT32 {0x0000001e, 0x00000005, 0x0000000a, 0x00000014} IMM[7] FLT32 {0x00000014, 0x0000000a, 0x0000000f, 0x00000019} Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 2 +-...
2009 Nov 05
6
Some cosmetic NV10TCL method changes.
The attached patch does the cosmetic renouveau.xml changes I proposed. I'm about to reply myself with some other patches to update libdrm and then fix the API break up. -------------- next part -------------- A non-text attachment was scrubbed... Name: rename_some_nv10tcl_methods.patch Type: text/x-diff Size: 2507 bytes Desc: not available Url :
2009 Dec 26
3
[PATCH 1/3] nouveau: Drop some annoying _DX_ (direct x?) object name prefixes.
..._COLOR_R_SHIFT 16 -#define NV03_DX3_TEXTURED_TRIANGLE_FOG_COLOR_R_MASK 0x00ff0000 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT 0x00000314 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_INTERPOLATOR_SHIFT 0 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_INTERPOLATOR_MASK 0x0000000f -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_U_SHIFT 4 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_U_MASK 0x00000030 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_V_SHIFT 6 -#define NV03_DX3_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_V_MASK 0x000000c0 -#define...
2017 Nov 16
0
[PATCH] nouveau/codegen: dump tgsi floats as hex values
...de patching the output and the tgsi parser (who > wants to delete half the output to parse it again e.g. with > nouveau_compiler). > > I can image an output similar to the one below: > > IMM[5] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} ^ IMM[5] FLT32 > {0x00000019, 0x0000000f, 0x00000005, 0x0000001e} > IMM[6] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} = IMM[6] FLT32 > {0x0000001e, 0x00000005, 0x0000000a, 0x00000014} > IMM[7] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} IMM[7] FLT32 > {0x00000014, 0x0000000a, 0x0000000f, 0x00000019} &g...
2019 Mar 26
4
GSoC19: Improve LLVM binary utilities
(Adding just a bit to Jake's response) On Tue, Mar 26, 2019 at 11:31 AM Jake Ehrlich via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi Seiya, > > What should I prioritize? I suppose that improving llvm-objcopy is the >> most crucial work in this summer. > > > This is an opinion that will vary a lot from person to person. > +1! And don't forget that
2005 Jan 15
0
ADSI unlock codes
...provider lock number key from database list. ch33s3 First reset phone. Set clock to Jan 1 12:00AM (options-2?). exit to main screen. press options, (mute/flash/speaker/?) until you see firmware version. press # to reset. google more info, bam ch33s3d ; Bell Canada Vista 350 450 390 480 FDN 0x0000000F ; Descriptor number -bc350-d SECURITY 0xB288072A ; Security code -bc350-d ;FDN 0x01000002 ; Descriptor number -bc350-SL (slot2) ;SECURITY 0xD886020C ; Security code -bc350-SL (slot2) ;FDN 0x01000003...
2016 Oct 16
2
[PATCH] exa: add GM10x acceleration support
...+static uint32_t +NV110FP_Composite_A8[] = { + 0x00001462, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x80000000, + 0x00000a0a, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x0000000f, + 0x00000000, +#include "exac8nv110.fpc" +}; +#else + +sched (st 0x0) (st 0x0) (st 0x0) +ipa pass $r0 a[0x7c] 0x0 0x0 0x1 +mufu rcp $r0 $r0 +ipa $r3 a[0x94] $r0 0x0 0x1 +sched (st 0x0) (st 0x0) (st 0x0) +ipa $r2 a[0x90] $r0 0x0 0x1 +tex nodep $r1 $r2 0x0 0x1 t2d 0x8 +ipa $r3 a[0x84] $r0...
2017 Nov 15
0
[PATCH] nouveau/codegen: dump tgsi floats as hex values
...[5] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} > IMM[6] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} > IMM[7] FLT32 { 0.0000, 0.0000, 0.0000, 0.0000} > > when printing the values as hex, we can now see the differences: > IMM[5] FLT32 {0x00000019, 0x0000000f, 0x00000005, 0x0000001e} > IMM[6] FLT32 {0x0000001e, 0x00000005, 0x0000000a, 0x00000014} > IMM[7] FLT32 {0x00000014, 0x0000000a, 0x0000000f, 0x00000019} > > Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> > --- > src/gallium/drivers/nouveau/codege...
2004 May 23
1
Aastra ADSI phone
...shows all four entrys as "<available>". When I give the phone "ADSIProg()" the phone displays: Asterisk PBX download refused Conflict with: <available> The asterisk.adsi hasn't been changed: DESCRIPTION "Asterisk PBX" VERSION 0x02 SECURITY 0x0000 FDN 0x0000000f ... When I change the FDN number to anything else, the phone replies "Services full". Is the phone properly unlocked? Has anyone seen this before? Thanks, -- Michael Welter Introspect Telephony Corp. Denver, Colorado +1 303 674 2575 mike@introspect.com www.introspect.com
2009 Nov 16
2
[LLVMdev] rpaths in llvm binaries
...thread.so.0] 0x00000001 (NEEDED) Shared library: [libstdc++.so.6] 0x00000001 (NEEDED) Shared library: [libm.so.0] 0x00000001 (NEEDED) Shared library: [libgcc_s.so.1] 0x00000001 (NEEDED) Shared library: [libc.so.12] 0x0000000f (RPATH) Library rpath: [/home/tim/downloads/llvm-2.6/Release/bin] 0x0000000c (INIT) 0x804dfe0 ............. As root, for packaging: # readelf -d /usr/pkg/bin/llvm-ar Dynamic section at offset 0x152028 contains 25 entries: Tag Type...
2014 Sep 04
1
[PATCH 4/8] fb/ramnve0: Disable FB before reclocking
...truct nouveau_fb *pfb, struct nouveau_ram_data *next) > if (ret) > return ret; > > + ram_fb_disable(fuc); > + > ram->mode = (next->freq > fuc->refpll.vco1.max_freq) ? 2 : 1; > ram->from = ram_rd32(fuc, 0x1373f4) & 0x0000000f; > > @@ -1061,6 +1063,9 @@ nve0_ram_calc_xits(struct nouveau_fb *pfb, struct nouveau_ram_data *next) > break; > } > > + if (!ret) > + ram_fb_enable(fuc); > + > return ret; > } > > -- > 1.9.3 > > > &...
2016 Oct 27
0
[PATCH v2 1/7] exa: add GM10x acceleration support
...+static uint32_t +NV110FP_Composite_A8[] = { + 0x00001462, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x80000000, + 0x00000a0a, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x0000000f, + 0x00000000, +#include "exac8nv110.fpc" +}; +#else + +sched (st 0x0) (st 0x0) (st 0x0) +ipa pass $r0 a[0x7c] 0x0 0x0 0x1 +mufu rcp $r0 $r0 +ipa $r3 a[0x94] $r0 0x0 0x1 +sched (st 0x0) (st 0x0) (st 0x0) +ipa $r2 a[0x90] $r0 0x0 0x1 +tex nodep $r1 $r2 0x0 0x1 t2d 0x8 +ipa $r3 a[0x84] $r0...
2016 Oct 17
0
[PATCH] exa: add GM10x acceleration support
...000000, > + 0x00000000, > + 0x00000000, > + 0x80000000, > + 0x00000a0a, > + 0x00000000, > + 0x00000000, > + 0x00000000, > + 0x00000000, > + 0x00000000, > + 0x00000000, > + 0x00000000, > + 0x00000000, > + 0x00000000, > + 0x00000000, > + 0x00000000, > + 0x0000000f, > + 0x00000000, > +#include "exac8nv110.fpc" > +}; > +#else > + > +sched (st 0x0) (st 0x0) (st 0x0) Those sched codes are definitely bad, but let's keep them as it for now. I might have a look at some point to improve the thing. > +ipa pass $r0 a[0x7c] 0x0 0x0...
2003 May 17
4
little ADSI problem
...is is the top of asterisk.adsi: DESCRIPTION "Asterisk PBX" ; Name of vendor VERSION 0x02 ; Version of stuff SECURITY "_AST" ; Security code ;SECURITY 0x0000 ; Security code FDN 0x0000000f ; Descriptor number This is the part of Zapata.conf that is applicable: ;FXS channels via 4 port FXO card usecallerid=yes hidecallerid=no callwaiting=yes callwaitingcallerid=yes threewaycalling=yes transfer=yes cancallforward=yes callreturn=no echocancel...
2013 Jul 02
1
[PATCH] drm/nv50-/disp: Use output specific mask in interrupt
...4300 + (ffs(outp.or) - 1) * 0x800; oval = (conf & 0x0100) ? 0x00000101 : 0x00000000; hval = 0x00000000; + mask = 0x00000707; } else { oreg = 0x614380 + (ffs(outp.or) - 1) * 0x800; oval = 0x00000001; hval = 0x00000001; + mask = 0x00000707; } nv_mask(priv, hreg, 0x0000000f, hval); - nv_mask(priv, oreg, 0x00000707, oval); + nv_mask(priv, oreg, mask, oval); } } -- 1.8.3.2
2010 Aug 30
0
Little problem with dxdllreg.exe, i think....
...) 0x33f804 > fixme:advapi:SetSecurityInfo stub > fixme:advapi:SetEntriesInAclA 1 0x33f7bc (nil) 0x33f804 > fixme:advapi:SetSecurityInfo stub > fixme:advapi:SetEntriesInAclA 1 0x33f7dc (nil) 0x33f824 > fixme:advapi:SetSecurityInfo stub > wine: Unhandled page fault on read access to 0x0000000f at address 0x68366137 (thread 0019), starting debugger... > Unhandled exception: page fault on read access to 0x0000000f in 32-bit code (0x68366137). > Register dump: > CS:0073 SS:007b DS:007b ES:007b FS:0033 GS:003b > EIP:68366137 ESP:0033f4d4 EBP:0033f83c EFLAGS:00010246( R- -- I...
2016 Oct 17
1
[PATCH] exa: add GM10x acceleration support
...; + 0x00000000, >> + 0x00000000, >> + 0x00000000, >> + 0x00000000, >> + 0x00000000, >> + 0x00000000, >> + 0x00000000, >> + 0x00000000, >> + 0x00000000, >> + 0x00000000, >> + 0x0000000f, >> + 0x00000000, >> +#include "exac8nv110.fpc" >> +}; >> +#else >> + >> +sched (st 0x0) (st 0x0) (st 0x0) > > > Those sched codes are definitely bad, but let's keep them as it for now. I > might have a look at some point to improv...
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
I believe I've addressed all the feedback from the first time around, and also made fixes necessary for GM20x based on testing results. I believe now it should actually work for all GM10x and GM20x. Further, GP10x should be very easy to add, but without someone to actually test I didn't want to claim support for it. Ilia Mirkin (7): exa: add GM10x acceleration support hwdefs: update
2013 Mar 13
0
Lots of IB_EMPTY errors on G98 (GeForce 8400 GS) on SPARC
...[ PFIFO][0001:01:00.0] DMA_PUSHER - ch 1 [DRM] get 0x0000000000 put 0x0000000000 ib_get 0x0000000d ib_put 0x0000000e state 0xa0000000 (err: IB_EMPTY) push 0x00406040 [ 76.734229] nouveau E[ PFIFO][0001:01:00.0] DMA_PUSHER - ch 1 [DRM] get 0x0000000000 put 0x0000000000 ib_get 0x0000000e ib_put 0x0000000f state 0xa0000000 (err: IB_EMPTY) push 0x00406040 [ 76.734291] nouveau E[ PFIFO][0001:01:00.0] DMA_PUSHER - ch 1 [DRM] get 0x0000000000 put 0x0000000000 ib_get 0x0000000f ib_put 0x00000010 state 0xa0000000 (err: IB_EMPTY) push 0x00406040 [ 76.734353] nouveau E[ PFIFO][0001:01:00.0] DMA_PUSHE...