Displaying 20 results from an estimated 252 matches for "0ull".
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0ul
2010 Jul 22
4
[PATCH 1/3] ext3/ext4: Factor out disk addressability check
...G_ON(blocksize_bits < 9);
+ BUG_ON(blocksize_bits > PAGE_CACHE_SHIFT);
+
+ if (unlikely(num_blocks == 0))
+ return 0;
+
+ printk(KERN_INFO "HERE %u %lu %u %u", blocksize_bits, last_fs_block,
+ sizeof(sector_t), sizeof(pgoff_t));
+
+ if ((last_fs_block >
+ (sector_t)(~0ULL) >> (blocksize_bits - 9)) ||
+ (last_fs_block >
+ (pgoff_t)(~0ULL) >> (PAGE_CACHE_SHIFT - blocksize_bits))) {
+ return -EFBIG;
+ }
+ return 0;
+}
+EXPORT_SYMBOL(generic_check_addressable);
+
/*
* No-op implementation of ->fsync for in-memory filesystems.
*/
diff --g...
2012 May 30
2
[LLVMdev] Minor typo in source file ObjectFile.h
const uint64_t UnknownAddressOrSize
<http://llvm.org/doxygen/namespacellvm_1_1object.html#abcfa9b6f24c69c52d2489a102ba3583c>
= ~0ULL
This found at line 260 in ObjectFile.h. Notice the 0ULL thingy.
Cheers,
Mikael
-- Love Thy Frog!
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2012 May 31
0
[LLVMdev] Minor typo in source file ObjectFile.h
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Mikael Lyngvig
> Subject: [LLVMdev] Minor typo in source file ObjectFile.h
> const uint64_t UnknownAddressOrSize = ~0ULL
> This found at line 260 in ObjectFile.h. Notice the 0ULL thingy.
What do you find troubling about it? It's simply a way to set all bits in an unsigned variable.
- Chuck
THIS COMMUNICATION MAY CONTAIN CONFIDENTIAL AND/OR OTHERWISE PROPRIETARY MATERIAL and is thus for use only by the...
2012 May 30
0
[LLVMdev] Fwd: Minor typo in source file ObjectFile.h (CANCELLATION)
Here we go again... It took me a while to figure out that the stuff below
is valid: ~0ull. I never saw the suffix written in uppercase before and
the code below must be eligble for a price in hilarious coincidences.
Cheers,
Mikael
---------- Forwarded message ----------
From: Mikael Lyngvig <mikael at lyngvig.org>
Date: 2012/5/31
Subject: Minor typo in source file ObjectFile.h...
2015 Jan 19
2
[LLVMdev] X86TargetLowering::LowerToBT
...1, %rdi
LLVM should be able to replace these two with a single X86_64 instruction:
btq reg,25
The generated code is correct in both cases. It just isn't optimized in the
immediate operatnd case.
unsigned long long IsBitSetA(unsigned long long val)
{
return (val & (1ULL<<25)) != 0ULL;
}
unsigned long long IsBitSetB(unsigned long long val, int index)
{
return (val & (1ULL<<index)) != 0ULL;
}
On Sun, Jan 18, 2015 at 10:02 PM, Mehdi Amini <mehdi.amini at apple.com> wrote:
> Hi,
>
> Can you provide a reproducible example? I feel especially your firs...
2010 Nov 16
2
[Btrfs-Progs] Update for lzo support
...*/
#define BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF (1ULL << 0)
-#define BTRFS_FEATURE_INCOMPAT_DEFAULT_SUBVOL (2ULL << 0)
+#define BTRFS_FEATURE_INCOMPAT_DEFAULT_SUBVOL (1ULL << 1)
+#define BTRFS_FEATURE_INCOMPAT_COMPRESS_LZO (1ULL << 3)
#define BTRFS_FEATURE_COMPAT_SUPP 0ULL
#define BTRFS_FEATURE_COMPAT_RO_SUPP 0ULL
-#define BTRFS_FEATURE_INCOMPAT_SUPP \
- (BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF | \
- BTRFS_FEATURE_INCOMPAT_DEFAULT_SUBVOL)
+#define BTRFS_FEATURE_INCOMPAT_SUPP \
+ (BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF | \
+ BTRFS_FEATURE_INCOMPAT_DEFAULT_SUBVOL |...
2011 Jul 13
1
[LLVMdev] eleminate unsigned long long in llc march=c
Hi, I tried llc march=c to export c codes, and codes are really good, except that I have a lagged compiler that don't recognize long long type, including the long long constants like 0ull
so is there a switch for that or what should I do?
thanks
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2015 Nov 27
0
[mesa v2 9/9] nouveau: enable use of new kernel interfaces
...u/drm/nouveau_drm_winsys.c
+++ b/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
@@ -97,8 +97,6 @@ nouveau_drm_screen_create(int fd)
if (ret)
goto err;
- drm->nvif = false;
-
ret = nouveau_device_new(&drm->client, NV_DEVICE,
&(struct nv_device_v0) {
.device = ~0ULL,
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_screen.c b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
index 1a74ae2..6f61f66 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_screen.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
@@ -108,8 +108,6 @@ nouveau_init_screen2(__DRIscreen *dri...
2015 Dec 28
0
[PATCH] Revert "nouveau: enable use of new kernel interfaces"
...ys/nouveau/drm/nouveau_drm_winsys.c
@@ -97,6 +97,8 @@ nouveau_drm_screen_create(int fd)
if (ret)
goto err;
+ drm->nvif = debug_get_bool_option("NOUVEAU_NVIF", false);
+
ret = nouveau_device_new(&drm->client, NV_DEVICE,
&(struct nv_device_v0) {
.device = ~0ULL,
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_screen.c b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
index 6f61f66..1a74ae2 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_screen.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
@@ -108,6 +108,8 @@ nouveau_init_screen2(__DRIscreen *dri...
2019 Sep 16
0
[PATCH 1/2] drm/nouveau: tegra: Fix NULL pointer dereference
...rs/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c
@@ -261,6 +261,34 @@ gk20a_instobj_release_iommu(struct nvkm_memory *memory)
nvkm_ltc_invalidate(ltc);
}
+static u64
+gk20a_instobj_bar2_dma(struct nvkm_memory *memory)
+{
+ struct gk20a_instobj_dma *iobj = gk20a_instobj_dma(memory);
+ u64 addr = ~0ULL;
+
+ if (gk20a_instobj_acquire_dma(&iobj->base.memory))
+ addr = gk20a_instobj_addr(&iobj->base.memory);
+
+ gk20a_instobj_release_dma(&iobj->base.memory);
+
+ return addr;
+}
+
+static u64
+gk20a_instobj_bar2_iommu(struct nvkm_memory *memory)
+{
+ struct gk20a_instobj_iommu *...
2020 Mar 20
1
[PATCH 3/4] mm: simplify device private page handling in hmm_range_fault
...+ uint64_t pfns[64];
>> + unsigned char perm[64];
>> + char __user *uptr;
>> + struct hmm_range range = {
>> + .pfns = pfns,
>> + .flags = dmirror_hmm_flags,
>> + .values = dmirror_hmm_values,
>> + .pfn_shift = DPT_SHIFT,
>> + .pfn_flags_mask = ~0ULL,
>
> Same here, especially since this is snapshot
>
> Jason
Actually, snapshot ignores pfn_flags_mask and default_flags.
In hmm_pte_need_fault(), HMM_FAULT_SNAPSHOT is checked and returns early before
checking pfn_flags_mask and default_flags since no faults are being requested.
2020 Feb 07
0
[RFC PATCH v7 23/78] KVM: x86: add .spt_fault()
...struct kvm_arch_async_pf {
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index ab9576444e6b..f908ef374617 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -7358,6 +7358,14 @@ static u64 svm_fault_gla(struct kvm_vcpu *vcpu)
return svm->vcpu.arch.cr2 ? svm->vcpu.arch.cr2 : ~0ull;
}
+static bool svm_spt_fault(struct kvm_vcpu *vcpu)
+{
+ struct vcpu_svm *svm = to_svm(vcpu);
+ struct vmcb *vmcb = get_host_vmcb(svm);
+
+ return (vmcb->control.exit_code == SVM_EXIT_NPF);
+}
+
static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
.cpu_has_kvm_support = has_svm,
.d...
2023 Sep 09
0
[PATCH RFC v2 3/4] vhost-vdpa: should restore 1:1 dma mapping before detaching driver
...asid);
+}
+
static int vhost_vdpa_remove_as(struct vhost_vdpa *v, u32 asid)
{
struct vhost_vdpa_as *as = asid_to_as(v, asid);
@@ -140,6 +149,14 @@ static int vhost_vdpa_remove_as(struct vhost_vdpa *v, u32 asid)
hlist_del(&as->hash_link);
vhost_vdpa_iotlb_unmap(v, &as->iotlb, 0ULL, 0ULL - 1, asid);
+ /*
+ * Devices with on-chip IOMMU need to restore iotlb
+ * to 1:1 identity mapping before vhost-vdpa is going
+ * to be removed and detached from the device. Give
+ * them a chance to do so, as this cannot be done
+ * efficiently via the whole-range unmap call above.
+ */...
2012 Jun 27
1
[PATCH] x86/hvm: increase struct hvm_vcpu_io's mmio_large_read
...tes;
- /* We may write up to m128 as a number of device-model transactions. */
- paddr_t mmio_large_write_pa;
+ /* We may write up to m256 as a number of device-model transactions. */
unsigned int mmio_large_write_bytes;
+ paddr_t mmio_large_write_pa;
};
#define VMCX_EADDR (~0ULL)
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Xen-devel@lists.xen.org
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2009 Dec 17
0
[PATCH] Btrfs: set a incompat flag when setting default subvol
...e.h
+++ b/fs/btrfs/ctree.h
@@ -370,11 +370,13 @@ struct btrfs_super_block {
* ones specified below then we will fail to mount
*/
#define BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF (1ULL << 0)
+#define BTRFS_FEATURE_INCOMPAT_DEFAULT_SUBVOL (2ULL << 0)
#define BTRFS_FEATURE_COMPAT_SUPP 0ULL
#define BTRFS_FEATURE_COMPAT_RO_SUPP 0ULL
#define BTRFS_FEATURE_INCOMPAT_SUPP \
- BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF
+ (BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF | \
+ BTRFS_FEATURE_INCOMPAT_DEFAULT_SUBVOL)
/*
* A leaf is full of items. offset and size tell us where to find
diff --git a/fs/b...
2017 Sep 24
0
[iovisor-dev] [PATCH RFC 0/4] Initial 32-bit eBPF encoding support
...t some natural sign extension is gone
> > with "clearing the upper 32-bit register" and such clearing may make
> > some operation, esp. memory operation not correct in 64-bit machine?
>
> Hm. Perhaps it's a blunder on my side, but let's take:
>
> r1 = ~0ULL
> w1 = 0
> # use r1
>
> on x86 and the interpreter, the w1 = 0 will clear upper 32bits, so r1
> ends up as 0. 32b arches may translate this to something like:
>
> # r1 = ~0ULL
> r1.lo = ~0
> r1.hi = ~0
> # w1 = 0
> r1.lo = 0
> # r1.hi not touch...
2013 Oct 22
0
[PATCH] Btrfs-progs: add support for the no holes incompat flag
...per_block {
#define BTRFS_FEATURE_INCOMPAT_EXTENDED_IREF (1ULL << 6)
#define BTRFS_FEATURE_INCOMPAT_RAID56 (1ULL << 7)
#define BTRFS_FEATURE_INCOMPAT_SKINNY_METADATA (1ULL << 8)
-
+#define BTRFS_FEATURE_INCOMPAT_NO_HOLES (1ULL << 9)
#define BTRFS_FEATURE_COMPAT_SUPP 0ULL
#define BTRFS_FEATURE_COMPAT_RO_SUPP 0ULL
@@ -482,7 +482,8 @@ struct btrfs_super_block {
BTRFS_FEATURE_INCOMPAT_EXTENDED_IREF | \
BTRFS_FEATURE_INCOMPAT_RAID56 | \
BTRFS_FEATURE_INCOMPAT_MIXED_GROUPS | \
- BTRFS_FEATURE_INCOMPAT_SKINNY_METADATA)
+ BTRFS_FEATURE_INCOMPAT_SKINNY_METAD...
2015 Jan 19
6
[LLVMdev] X86TargetLowering::LowerToBT
I'm tracking down an X86 code generation malfeasance regarding BT (bit
test) and I have some questions.
This IR *matches* and then *X86TargetLowering::LowerToBT **is called:*
%and = and i64 %shl, %val * ; (val & (1 << index)) != 0 ; *bit test
with a *register* index
This IR *does not match* and so *X86TargetLowering::LowerToBT **is not
called:*
%and = lshr i64 %val, 25
2012 Sep 12
4
[LLVMdev] [cfe-dev] SPIR Portability Discussion
...ariance in the sizeof(int) across devices.
I think you're still misunderstanding. If size_t is 32 bits, sizeof(int) + -8LL is -4LL, so the comparison produces true. If it's 64 bits, the -8LL promotes to an unsigned long long, sizeof(int) + -8LL is 18446744073709551612ULL, the 0 promotes to 0ULL, and the comparison produces false.
[Villmow, Micah] I see now, I think you had a type-o in the previous email, "sizeof(sizeof(int))" should have been size_t(sizeof(int)), which was throwing me off. I view this case as being well defined in SPIR. It can be produced with something like the...
2020 Apr 24
1
[PATCH] drm/nouveau/mmu: Remove unneeded semicolon
...4ac..199f94e15c5f 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
@@ -580,7 +580,7 @@ nvkm_vmm_iter(struct nvkm_vmm *vmm, const struct nvkm_vmm_page *page,
it.pte[it.lvl]++;
}
}
- };
+ }
nvkm_vmm_flush(&it);
return ~0ULL;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h
index 5e55ecbd8005..d3f8f916d0db 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h
@@ -304,7 +304,7 @@ int tu102_vmm_new(struct nv...