Displaying 20 results from an estimated 26 matches for "0fffffff0h".
2008 Jul 12
2
[LLVMdev] Shuffle regression
...e attached a
replacement of fibonacci.cpp to reproduce the issue. It runs fine on release
2.3 but revision 52648 fails, and I suspect that the issue is still present.
2.3 generates the following x86 code:
03A10010 push ebp
03A10011 mov ebp,esp
03A10013 and esp,0FFFFFFF0h
03A10019 movups xmm0,xmmword ptr ds:[141D280h]
03A10020 xorps xmm1,xmm1
03A10023 movaps xmm2,xmm0
03A10026 shufps xmm2,xmm1,32h
03A1002A movaps xmm1,xmm0
03A1002D shufps xmm1,xmm2,84h
03A10031 shufps xmm0,xmm1,23h
03A10035 shufps xmm1...
2008 Jul 12
0
[LLVMdev] Shuffle regression
...onacci.cpp to reproduce the issue. It
> runs fine on release 2.3 but revision 52648 fails, and I suspect
> that the issue is still present.
>
> 2.3 generates the following x86 code:
>
> 03A10010 push ebp
> 03A10011 mov ebp,esp
> 03A10013 and esp,0FFFFFFF0h
> 03A10019 movups xmm0,xmmword ptr ds:[141D280h]
> 03A10020 xorps xmm1,xmm1
> 03A10023 movaps xmm2,xmm0
> 03A10026 shufps xmm2,xmm1,32h
> 03A1002A movaps xmm1,xmm0
> 03A1002D shufps xmm1,xmm2,84h
> 03A10031 shufps xmm0,xmm1,23h
> 03...
2008 Jul 14
5
[LLVMdev] Spilled variables using unaligned moves
...looks like vector spills don't use aligned moves even though the stack is
aligned. This seems like an optimization opportunity.
The attached replacement of fibonacci.cpp generates x86 code like this:
03A70010 push ebp
03A70011 mov ebp,esp
03A70013 and esp,0FFFFFFF0h
03A70019 sub esp,1A0h
...
03A7006C movups xmmword ptr [esp+180h],xmm7
...
03A70229 mulps xmm1,xmmword ptr [esp+180h]
...
03A70682 movups xmm0,xmmword ptr [esp+180h]
Note how stores and loads use unaligned moves while it could use aligned
moves. It's also...
2008 Jul 14
0
[LLVMdev] Spilled variables using unaligned moves
...on’t use aligned moves even though the
> stack is aligned. This seems like an optimization opportunity.
>
> The attached replacement of fibonacci.cpp generates x86 code like
> this:
>
> 03A70010 push ebp
> 03A70011 mov ebp,esp
> 03A70013 and esp,0FFFFFFF0h
> 03A70019 sub esp,1A0h
> ...
> 03A7006C movups xmmword ptr [esp+180h],xmm7
> ...
> 03A70229 mulps xmm1,xmmword ptr [esp+180h]
> ...
> 03A70682 movups xmm0,xmmword ptr [esp+180h]
>
> Note how stores and loads use unaligned moves while it could...
2008 Jul 14
0
[LLVMdev] Spilled variables using unaligned moves
...an optimization opportunity.
What target is this? Linux doesn't have a 16-byte aligned stack.
-Chris
>
> The attached replacement of fibonacci.cpp generates x86 code like
> this:
>
> 03A70010 push ebp
> 03A70011 mov ebp,esp
> 03A70013 and esp,0FFFFFFF0h
> 03A70019 sub esp,1A0h
> ...
> 03A7006C movups xmmword ptr [esp+180h],xmm7
> ...
> 03A70229 mulps xmm1,xmmword ptr [esp+180h]
> ...
> 03A70682 movups xmm0,xmmword ptr [esp+180h]
>
> Note how stores and loads use unaligned moves while it could...
2008 Jul 10
3
[LLVMdev] InstructionCombining forgets alignment of globals
...03C20030 pop ebp
03C20031 ret
All three SSE instructions will generate a fault for accessing unaligned
memory. Disabling InstructionCombining gives me the following correct code:
03B10010 push ebp
03B10011 mov ebp,esp
03B10013 and esp,0FFFFFFF0h
03B10019 movups xmm0,xmmword ptr ds:[164E79Ah]
03B10020 movups xmm1,xmmword ptr ds:[164E799h]
03B10027 mulps xmm1,xmm0
03B1002A movups xmmword ptr ds:[164E799h],xmm1
03B10031 mov esp,ebp
03B10033 pop ebp
03B10034 ret
Unless I'm...
2008 Jul 15
1
[LLVMdev] Spilled variables using unaligned moves
...It looks like vector spills don't use aligned moves even though the stack is
aligned. This seems like an optimization opportunity.
The attached replacement of fibonacci.cpp generates x86 code like this:
03A70010 push ebp
03A70011 mov ebp,esp
03A70013 and esp,0FFFFFFF0h
03A70019 sub esp,1A0h
...
03A7006C movups xmmword ptr [esp+180h],xmm7
...
03A70229 mulps xmm1,xmmword ptr [esp+180h]
...
03A70682 movups xmm0,xmmword ptr [esp+180h]
Note how stores and loads use unaligned moves while it could use aligned
moves. It's also i...
2011 Oct 26
2
[LLVMdev] Lowering to MMX
...klbw(x86_mmx %6, x86_mmx %6)
%8 = bitcast i8* %0 to x86_mmx*
store x86_mmx %7, x86_mmx* %8, align 1
ret void
}
declare x86_mmx @llvm.x86.mmx.punpcklbw(x86_mmx, x86_mmx) nounwind readnone
Which gives me the following assembly code:
push ebp
mov ebp,esp
and esp,0FFFFFFF0h
sub esp,20h
mov eax,dword ptr [ebp+0Ch]
movd xmm0,dword ptr [eax]
movapd xmmword ptr [esp],xmm0
movq mm0,mmword ptr [esp]
punpcklbw mm0,mm0
mov eax,dword ptr [ebp+8]
movq mmword ptr [eax],mm0
emms
mov esp,ebp
pop...
2011 Oct 26
0
[LLVMdev] Lowering to MMX
...cast i8* %0 to x86_mmx*
> store x86_mmx %7, x86_mmx* %8, align 1
> ret void
> }
> declare x86_mmx @llvm.x86.mmx.punpcklbw(x86_mmx, x86_mmx) nounwind readnone
>
> Which gives me the following assembly code:
>
> push ebp
> mov ebp,esp
> and esp,0FFFFFFF0h
> sub esp,20h
> mov eax,dword ptr [ebp+0Ch]
> movd xmm0,dword ptr [eax]
> movapd xmmword ptr [esp],xmm0
> movq mm0,mmword ptr [esp]
> punpcklbw mm0,mm0
> mov eax,dword ptr [ebp+8]
> movq mmword ptr [eax],mm0
> emms
>...
2008 Jul 10
0
[LLVMdev] InstructionCombining forgets alignment of globals
...03C20030 pop ebp
03C20031 ret
All three SSE instructions will generate a fault for accessing unaligned
memory. Disabling InstructionCombining gives me the following correct code:
03B10010 push ebp
03B10011 mov ebp,esp
03B10013 and esp,0FFFFFFF0h
03B10019 movups xmm0,xmmword ptr ds:[164E79Ah]
03B10020 movups xmm1,xmmword ptr ds:[164E799h]
03B10027 mulps xmm1,xmm0
03B1002A movups xmmword ptr ds:[164E799h],xmm1
03B10031 mov esp,ebp
03B10033 pop ebp
03B10034 ret
Unless I'm...
2013 Jul 19
2
[LLVMdev] SIMD instructions and memory alignment on X86
...call 76719BA1
>
> I am assuming this is the sqrt function as this is the only function
> called in the LLVM IR.
>
> The code at 76719BA1 is:
>
> 76719BA1 push ebp
> 76719BA2 mov ebp,esp
> 76719BA4 sub esp,20h
> 76719BA7 and esp,0FFFFFFF0h
> 76719BAA fld st(0)
> 76719BAC fst dword ptr [esp+18h]
> 76719BB0 fistp qword ptr [esp+10h]
> 76719BB4 fild qword ptr [esp+10h]
> 76719BB8 mov edx,dword ptr [esp+18h]
> 76719BBC mov eax,dword ptr [esp+10h]
> 76719BC0 test...
2013 Jul 19
0
[LLVMdev] SIMD instructions and memory alignment on X86
...he disassembly, I'm seeing three cases of
call 76719BA1
I am assuming this is the sqrt function as this is the only function
called in the LLVM IR.
The code at 76719BA1 is:
76719BA1 push ebp
76719BA2 mov ebp,esp
76719BA4 sub esp,20h
76719BA7 and esp,0FFFFFFF0h
76719BAA fld st(0)
76719BAC fst dword ptr [esp+18h]
76719BB0 fistp qword ptr [esp+10h]
76719BB4 fild qword ptr [esp+10h]
76719BB8 mov edx,dword ptr [esp+18h]
76719BBC mov eax,dword ptr [esp+10h]
76719BC0 test eax,eax
76719BC2 je 7...
2013 Jul 19
0
[LLVMdev] SIMD instructions and memory alignment on X86
...t; I am assuming this is the sqrt function as this is the only
> function called in the LLVM IR.
>
> The code at 76719BA1 is:
>
> 76719BA1 push ebp
> 76719BA2 mov ebp,esp
> 76719BA4 sub esp,20h
> 76719BA7 and esp,0FFFFFFF0h
> 76719BAA fld st(0)
> 76719BAC fst dword ptr [esp+18h]
> 76719BB0 fistp qword ptr [esp+10h]
> 76719BB4 fild qword ptr [esp+10h]
> 76719BB8 mov edx,dword ptr [esp+18h]
> 76719BBC mov eax,dword ptr [esp+10h]...
2013 Jul 19
4
[LLVMdev] SIMD instructions and memory alignment on X86
...am assuming this is the sqrt function as this is the only function
>> called in the LLVM IR.
>>
>> The code at 76719BA1 is:
>>
>> 76719BA1 push ebp
>> 76719BA2 mov ebp,esp
>> 76719BA4 sub esp,20h
>> 76719BA7 and esp,0FFFFFFF0h
>> 76719BAA fld st(0)
>> 76719BAC fst dword ptr [esp+18h]
>> 76719BB0 fistp qword ptr [esp+10h]
>> 76719BB4 fild qword ptr [esp+10h]
>> 76719BB8 mov edx,dword ptr [esp+18h]
>> 76719BBC mov eax,dword ptr [esp+10h]...
2013 Jul 19
3
[LLVMdev] fptoui calling a function that modifies ECX
...in the LLVM IR.
>>>>>
>>>>> The code at 76719BA1 is:
>>>>>
>>>>> 76719BA1 push ebp
>>>>> 76719BA2 mov ebp,esp
>>>>> 76719BA4 sub esp,20h
>>>>> 76719BA7 and esp,0FFFFFFF0h
>>>>> 76719BAA fld st(0)
>>>>> 76719BAC fst dword ptr [esp+18h]
>>>>> 76719BB0 fistp qword ptr [esp+10h]
>>>>> 76719BB4 fild qword ptr [esp+10h]
>>>>> 76719BB8 mov edx,dword ptr [esp...
2013 Jul 19
2
[LLVMdev] SIMD instructions and memory alignment on X86
That should map directly to sqrtpd which can't modify ecx.
On Thu, Jul 18, 2013 at 10:27 PM, Peter Newman <peter at uformia.com> wrote:
> Sorry, that should have been llvm.x86.sse2.sqrt.pd
>
>
> On 19/07/2013 3:25 PM, Craig Topper wrote:
>
> What is "frep.x86.sse2.sqrt.pd". I'm only familiar with things prefixed
> with "llvm.x86".
>
2013 Jul 19
2
[LLVMdev] fptoui calling a function that modifies ECX
...>>>
>>>>>> The code at 76719BA1 is:
>>>>>>
>>>>>> 76719BA1 push ebp
>>>>>> 76719BA2 mov ebp,esp
>>>>>> 76719BA4 sub esp,20h
>>>>>> 76719BA7 and esp,0FFFFFFF0h
>>>>>> 76719BAA fld st(0)
>>>>>> 76719BAC fst dword ptr [esp+18h]
>>>>>> 76719BB0 fistp qword ptr [esp+10h]
>>>>>> 76719BB4 fild qword ptr [esp+10h]
>>>>>> 76719BB8 mov...
2013 Jul 19
0
[LLVMdev] fptoui calling a function that modifies ECX
...>>
>>>> The code at 76719BA1 is:
>>>>
>>>> 76719BA1 push ebp
>>>> 76719BA2 mov ebp,esp
>>>> 76719BA4 sub esp,20h
>>>> 76719BA7 and esp,0FFFFFFF0h
>>>> 76719BAA fld st(0)
>>>> 76719BAC fst dword ptr [esp+18h]
>>>> 76719BB0 fistp qword ptr [esp+10h]
>>>> 76719BB4 fild qword ptr [esp+10h]
>>>>...
2013 Jul 19
2
[LLVMdev] fptoui calling a function that modifies ECX
...;>>>> The code at 76719BA1 is:
>>>>>>>
>>>>>>> 76719BA1 push ebp
>>>>>>> 76719BA2 mov ebp,esp
>>>>>>> 76719BA4 sub esp,20h
>>>>>>> 76719BA7 and esp,0FFFFFFF0h
>>>>>>> 76719BAA fld st(0)
>>>>>>> 76719BAC fst dword ptr [esp+18h]
>>>>>>> 76719BB0 fistp qword ptr [esp+10h]
>>>>>>> 76719BB4 fild qword ptr [esp+10h]
>>>>>>>...
2013 Jul 19
0
[LLVMdev] fptoui calling a function that modifies ECX
...The code at 76719BA1 is:
>>>>>
>>>>> 76719BA1 push ebp
>>>>> 76719BA2 mov ebp,esp
>>>>> 76719BA4 sub esp,20h
>>>>> 76719BA7 and esp,0FFFFFFF0h
>>>>> 76719BAA fld st(0)
>>>>> 76719BAC fst dword ptr [esp+18h]
>>>>> 76719BB0 fistp qword ptr [esp+10h]
>>>>> 76719BB4 fild qword ptr [esp+10h]
>>>&g...