search for: 0f7fe6fd

Displaying 3 results from an estimated 3 matches for "0f7fe6fd".

2013 May 24
0
[LLVMdev] Avoiding MCRegAliasIterator with register units
Jakob, I've implemented a patch that reworks the MCRegAliasIterator to dynamically compute the register aliases. The size reduction in the RegDiffLists are rather dramatic. Here are a few size differences for MCTargetDesc.o files (before and after) in bytes: R600 - 36160B - 11184B - 69% reduction ARM - 28480B - 8368B - 71% reduction Mips - 816B - 576B - 29% reduction One side effect of
2013 May 24
2
[LLVMdev] Avoiding MCRegAliasIterator with register units
...though you'll find more performance regressions than improvements, but that's my poor assumptions based on nothing concrete. ;) cheers, --renato -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130524/0f7fe6fd/attachment.html>
2013 May 22
2
[LLVMdev] Avoiding MCRegAliasIterator with register units
LLVM can model some quite complicated register banks now, and we even use registers to model some encoding constraints. For example, a few ARM instructions like strexd have two register operands that must be an aligned pair of consecutive GPR registers (like r0, r1). This constraint is modeled with the GPRPair register class containing R0_R1, R2_R3, ... pseudo-registers. Sometimes ISAs also