Displaying 1 result from an estimated 1 matches for "0dc27726".
2014 Dec 06
2
[LLVMdev] instruction/intrinsic for segmented adressing
Thanks again for your help!
> >>
> >> Probably fairly minimal in most cases (on x86). On ARM there is
> >> definitely a cost.
> >>
> > hm... why? You cannot have indexed addressing?
> What I need is a way to force
> The code that needs to be emitted is roughly:
> [..."segment"-offset into x1...]
> mrs x0, tpidr_el0
>