Displaying 2 results from an estimated 2 matches for "0d616c07".
2009 Oct 29
0
[LLVMdev] CPU feature control for JIT
On Oct 27, 2009, at 6:56 AM, Nicolas Capens wrote:
> Hi all,
>
> Is there a convenient way to control the instruction set extensions
> used for JIT compilation?
>
> In particular I’m looking at selecting the SSE level, for debugging
> and performance comparison purposes. There appear to be command-line
> options for Clang but I haven’t figured out yet how to control
2009 Oct 27
2
[LLVMdev] CPU feature control for JIT
Hi all,
Is there a convenient way to control the instruction set extensions used for
JIT compilation?
In particular I'm looking at selecting the SSE level, for debugging and
performance comparison purposes. There appear to be command-line options for
Clang but I haven't figured out yet how to control them directly for JIT
compilation. And obviously I don't want it to generate