search for: 0b1011

...mentation within LLVM I read the respective documentation. After taking a longer look at how its done for x86 and ARMInstrInfo.td I came up with the following: let isCall = 1, Defs = [R0, R1, R2, R3, R12, LR, D0, D1, D2, D3, D4, D5, D6, D7, CPSR] in { def ARM_KERNEL_CMPXCHG : ABXI<0b1011, (outs), (ins i32:$oldval, i32:$newval, addr:$dst), "bl 0xffff0fc0", [(ATOMIC_CMP_SWAP addr:$dst, i32:$oldval, i32:$newval)]>; } This is probably far from being correct but thats because I could not find some things: Can I actually use 'i32' and...

Hi, I have reworked my previous example and got something which is accepted by tblgen: let isCall = 1, Defs = [R0, R1, R2, R3, R12, LR, D0, D1, D2, D3, D4, D5, D6, D7, CPSR] in { def ARM_ATOMIC_CMP_SWAP : ABXI<0b1011, (outs GPR:$dst), (ins i32imm:$ptr, i32imm:$old, i32imm:$new), "do_something", [(set GPR:$dst, (atomic_cmp_swap_32 globaladdr:$ptr, imm:$old, imm:$new))]>; } What I want to achieve first is that llc picks this definition when it finds an occuranc...

...Robert Schuster wrote: > Hi, > I have reworked my previous example and got something which is > accepted > by tblgen: > > let isCall = 1, > Defs = [R0, R1, R2, R3, R12, LR, > D0, D1, D2, D3, D4, D5, D6, D7, CPSR] in { > > def ARM_ATOMIC_CMP_SWAP : ABXI<0b1011, (outs GPR:$dst), (ins > i32imm:$ptr, i32imm:$old, i32imm:$new), > "do_something", > [(set GPR:$dst, > (atomic_cmp_swap_32 globaladdr:$ptr, imm:$old, > imm:$new))]>; > } > > What I want to achieve first is that llc picks this...