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2012 Aug 07
0
[LLVMdev] [RFC] Hexagon insn table refactoring
...let Defs = [PC], isPredicated = 1 in class V3_J2_jumprfnewpt<list<dag> P = [], string C = ""> : JRInst <(outs), (ins PredRegs:$Pu, IntRegs:$Rs), "if (!$Pu.new) jumpr:t $Rs", P, C> { bits<2> Pu; bits<5> Rs; IClass = 0b0101; Inst{27-21} = 0b0011011; Inst{12-11} = 0b11; Inst{9-8} = Pu; Inst{20-16} = Rs; }; let isReturn = 1, isBarrier = 1, isTerminator = 1 in def JMPR_cdnNotPt_V3 : V3_J2_jumprfnewpt<>, Requires<[HasV3T]>; The insn class would be in a sep...