Displaying 4 results from an estimated 4 matches for "0b010000".
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2012 Oct 15
2
[LLVMdev] Alternate instruction encoding for subtargets
...instructions are the same, hence I'd like to keep all the lowering and
pattern matching stuff unmodified
For example, the ADD sX, sY instruction in KCPSM3 is:
Inst{17-12} = 0b011000;
Inst{11-8} = sx;
Inst{7-4} = sy;
Inst{3-0} = 0;
While in KCPSM6 the same instruction is encoded:
Inst{17-12} = 0b010000;
Inst{11-8} = sx;
Inst{7-4} = sy;
Inst{3-0} = 0;
They even mostly kept the instruction formats!
Can I tell tablegen to have two encodings and switch between them
using a predicate?
I do not want to create new instructions (e.g. ADD_KCPSM3 and ADD_KCPSM6).
If that is not possible I will just dump t...
2006 Oct 02
0
[LLVMdev] Instruction descriptions question
...011, xor>;
defm SLL : F3_12<"sll" , 0b100101, shl>;
defm SRL : F3_12<"srl" , 0b100110, srl>;
defm SRA : F3_12<"sra" , 0b100111, sra>;
defm ADD : F3_12<"add" , 0b000000, add>;
defm ADDCC : F3_12<"addcc", 0b010000, addc>;
defm ADDX : F3_12<"addx" , 0b001000, adde>;
defm SUB : F3_12<"sub" , 0b000100, sub>;
defm SUBX : F3_12<"subx" , 0b001100, sube>;
defm SUBCC : F3_12<"subcc", 0b010100, SPcmpicc>;
...
Each of these 'defm's ex...
2006 Oct 01
2
[LLVMdev] Instruction descriptions question
Hi,
I'm trying to implement a new backend for an embedded CISC processor.
Therefore I thought that it makes sense to take X86 target as a basis,
to save some time.
But when I look into the X86InstrInfo.td, I have a very strong feeling
that it is one of the most complex instruction set descriptions
compared to other targets. I can imagine that this is due to the
complexity of X86's
2006 Oct 02
2
[LLVMdev] Instruction descriptions question
...LL : F3_12<"sll" , 0b100101, shl>;
> defm SRL : F3_12<"srl" , 0b100110, srl>;
> defm SRA : F3_12<"sra" , 0b100111, sra>;
> defm ADD : F3_12<"add" , 0b000000, add>;
> defm ADDCC : F3_12<"addcc", 0b010000, addc>;
> defm ADDX : F3_12<"addx" , 0b001000, adde>;
> defm SUB : F3_12<"sub" , 0b000100, sub>;
> defm SUBX : F3_12<"subx" , 0b001100, sube>;
> defm SUBCC : F3_12<"subcc", 0b010100, SPcmpicc>;
> ...
>
&g...