Displaying 1 result from an estimated 1 matches for "0b0001".
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000001
2017 Jan 25
2
Backend subtraction changed to negative addition
...n, i32* %n.addr, align 4
%0 = load i32* %n.addr, align 4
%sub = sub nsw i32 %0, 1
ret i32 %sub
}
But finally in code generation i am getting:
ldc r2, #-1
add r0, r2, r0
Should this not be doing:
ldc r2 #1
sub r0 r2 r0
I have defined both my add and sub instructions:
def ADD : ALUInst<0b0001, (outs GRRegs:$dst),
(ins GRRegs:$src1, GRRegs:$src2),
"add $src1, $src2, $dst",
[(set i32:$dst, (add i32:$src1, i32:$src2))]>;
def SUB : ALUInst<0b0010, (outs GRRegs:$dst),
(ins GRRegs:$src1, GRRegs:$src2)...