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2012 Feb 24
3
[LLVMdev] CodeGen instructions and patterns
Is there a generic function that gives the machine instructions and their patterns given in the .td files of a backend specification ? or a subset which match a certain opcode ? otherwise how are the machine instructions being accessed/matched for instruction selection ? -Omer -------------- next part -------------- An HTML attachment was scrubbed... URL:
2012 Feb 24
0
[LLVMdev] CodeGen instructions and patterns
Hi Omer, On Feb 24, 2012, at 8:46 AM, محمد ﻋﻤﺮ ﺩﻫﻠﻮﻯ <omerbeg at gmail.com> wrote: > Is there a generic function that gives the machine instructions and their patterns given in the .td files of a backend specification ? > or a subset which match a certain opcode ? I'm not aware of any dump utility functions to display that information concisely. I agree such a thing would be
2012 Feb 24
0
[LLVMdev] CodeGen instructions and patterns
...ning llc with the "-debug-only=isel" command line option. That will give lots of information about how the selector is going about figuring out which patterns to use. -Jim > Consider the following multiply add insstruction, given in ARMInstrInfo.td > > def MLA : AsMul1I32<0b0000001, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra), > IIC_iMAC32, "mla", "\t$Rd, $Rn, $Rm, $Ra", > [(set GPR:$Rd, (add (mul GPR:$Rn, GPR:$Rm), GPR:$Ra))]> > > How do I get this instruction and it corresponding pattern in the s...