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099db550
2013 Nov 06
0
[LLVMdev] loop vectorizer
...time soon, SCEV could probably be taught to recognize the specific pattern:
Instructions (or (and %a, C1), (shl %b, C2)) -> SCEV (add %a, %b)
-Andy
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2013 Oct 31
5
[LLVMdev] loop vectorizer
On 30 October 2013 18:40, Frank Winter <fwinter at jlab.org> wrote:
> const std::uint64_t ir0 = (i+0)%4; // not working
>
I thought this would be the case when I saw the original expression. Maybe
we need to teach module arithmetic to SCEV?
--renato
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