search for: 06x

.../bios/init.c +++ b/drivers/gpu/drm/nouveau/core/subdev/bios/init.c @@ -845,9 +845,8 @@ init_idx_addr_latched(struct nvbios_init *init) u32 data = nv_ro32(bios, init->offset + 13); u8 count = nv_ro08(bios, init->offset + 17); - trace("INDEX_ADDRESS_LATCHED\t" - "R[0x%06x] : R[0x%06x]\n\tCTRL &= 0x%08x |= 0x%08x\n", - creg, dreg, mask, data); + trace("INDEX_ADDRESS_LATCHED\tR[0x%06x] : R[0x%06x]\n", creg, dreg); + trace("\tCTRL &= 0x%08x |= 0x%08x\n", mask, data); init->offset += 18; while (count--) { -- 1.8.3.2

...---------------------------------------- Input: 48kHz 1 channel Output: 1 channel (1 uncoupled) 20ms packets, 64kbit/sec VBR Preskip: 312 Encoding complete ----------------------------------------------------- Encoded: 6.86 seconds Runtime: 1e-06 seconds (6.86e+06x realtime) Wrote: 57354 bytes, 343 packets, 9 pages Bitrate: 66.0921kbit/s (without overhead) Rate range: 48.8kbit/s to 110.4kbit/s (122 to 276 bytes per packet) Overhead: 1.19% (container+metadata) More specifically, I am interesting in knowing how should I interpret th...

...t; * when/why was the network capture stopped > And now a better suggestion --- a/core/fs/pxe/isr.c +++ b/core/fs/pxe/isr.c @@ -267,6 +267,7 @@ void pxe_start_isr(void) int hwad = ((int)MAC[0] << 16) + ((int)MAC[1] << 8) + MAC[2]; dprintf("pxe_start_isr: got %06x %04x\n", hwad, pxe_undi_iface.ServiceFlags); if ((hwad == 0x000023ae) && (pxe_undi_iface.ServiceFlags == 0xdc1b) || + (hwad == 0x0000155d) && (pxe_undi_iface.ServiceFlags == 0xdc1b) || (hwad == 0x005c260a) && (pxe_undi_iface.ServiceFlags ==...

...> --- a/core/fs/pxe/isr.c > +++ b/core/fs/pxe/isr.c > @@ -266,11 +266,10 @@ void pxe_start_isr(void) > dprintf("pxe_start_isr: trying poll by model\n"); > int hwad = ((int)MAC[0] << 16) + ((int)MAC[1] << 8) + MAC[2]; > dprintf("pxe_start_isr: got %06x %04x\n", hwad, pxe_undi_iface.ServiceFlags); > - if (hwad == 0x000023ae) { > - if (pxe_undi_iface.ServiceFlags == 0xdc1b) { > + if ((hwad == 0x000023ae) && (pxe_undi_iface.ServiceFlags == 0xdc1b) || > + (hwad == 0x00180373) && (pxe_undi_iface.ServiceFlags ==...

...ot;, sets, regs); + init->offset += 3 + (regs * 4); + + for (i = 0; i < sets; i++) { + for (j = 0; j < regs; j++, init->offset += 4) { + addr = nvbios_rd32(bios, reg_off + (j * 4)); + data = nvbios_rd32(bios, init->offset); + init_wr32(init, addr, data); + trace("\tR[0x%06x] = 0x%08x\n", addr, data); + } + } +} + static struct nvbios_init_opcode { void (*exec)(struct nvbios_init *); } init_opcode[] = { @@ -2268,6 +2294,7 @@ static struct nvbios_init_opcode { [0x9a] = { init_i2c_long_if }, [0xa9] = { init_gpio_ne }, [0xaa] = { init_reserved }, + [0xaf]...

...d > > > > And now a better suggestion > > --- a/core/fs/pxe/isr.c > +++ b/core/fs/pxe/isr.c > @@ -267,6 +267,7 @@ void pxe_start_isr(void) > int hwad = ((int)MAC[0] << 16) + ((int)MAC[1] << 8) + MAC[2]; > dprintf("pxe_start_isr: got %06x %04x\n", hwad, pxe_undi_iface.ServiceFlags); > if ((hwad == 0x000023ae) && (pxe_undi_iface.ServiceFlags == 0xdc1b) || > + (hwad == 0x0000155d) && (pxe_undi_iface.ServiceFlags == 0xdc1b) || > (hwad == 0x005c260a) && (pxe_undi_iface....

...= nv_rd32(priv, addr + 0x74); nv_error(priv, "TRAP_MP_EXEC - " - "TP %d MP %d: ", tpid, i); - nouveau_enum_print(nv50_mp_exec_error_names, status); + "TP %d MP %d:", tpid, i); + nouveau_bitfield_print(nv50_mp_exec_errors, status); pr_cont(" at %06x warp %d, opcode %08x %08x\n", pc&0xffffff, pc >> 24, oplow, ophigh); -- 1.8.3.2

...t;> +++ b/core/fs/pxe/isr.c >> @@ -266,11 +266,10 @@ void pxe_start_isr(void) >> dprintf("pxe_start_isr: trying poll by model\n"); >> int hwad = ((int)MAC[0] << 16) + ((int)MAC[1] << 8) + MAC[2]; >> dprintf("pxe_start_isr: got %06x %04x\n", hwad, pxe_undi_iface.ServiceFlags); >> - if (hwad == 0x000023ae) { >> - if (pxe_undi_iface.ServiceFlags == 0xdc1b) { >> + if ((hwad == 0x000023ae) && (pxe_undi_iface.ServiceFlags == 0xdc1b) || >> + (hwad == 0x00180373) &&...

...vice, 0x400108, 0x00000008); trap &= ~0x00000008; @@ -1064,7 +1111,8 @@ gf100_gr_trap_intr(struct gf100_gr *gr) if (trap & 0x00000010) { u32 stat = nvkm_rd32(device, 0x405840); - nvkm_error(subdev, "SHADER %08x\n", stat); + nvkm_error(subdev, "SHADER %08x, sph: 0x%06x, stage: 0x%02x\n", + stat, stat & 0xffffff, (stat >> 24) & 0x3f); nvkm_wr32(device, 0x405840, 0xc0000000); nvkm_wr32(device, 0x400108, 0x00000010); trap &= ~0x00000010; @@ -1072,7 +1120,11 @@ gf100_gr_trap_intr(struct gf100_gr *gr) if (trap & 0x00000040)...

...vice, 0x400108, 0x00000008); trap &= ~0x00000008; @@ -1064,7 +1111,8 @@ gf100_gr_trap_intr(struct gf100_gr *gr) if (trap & 0x00000010) { u32 stat = nvkm_rd32(device, 0x405840); - nvkm_error(subdev, "SHADER %08x\n", stat); + nvkm_error(subdev, "SHADER %08x, sph: 0x%06x, stage: 0x%02x\n", + stat, stat & 0xffffff, (stat >> 24) & 0x3f); nvkm_wr32(device, 0x405840, 0xc0000000); nvkm_wr32(device, 0x400108, 0x00000010); trap &= ~0x00000010; @@ -1072,7 +1120,11 @@ gf100_gr_trap_intr(struct gf100_gr *gr) if (trap & 0x00000040)...

...<P ALIGN=\"%s\">", + align_to_string (format->align)); + bullet = FALSE; + } + + // note we don't escape format->font, even thought it can have evil chars + g_string_append_printf (string, "<FONT FACE=\"%s\" SIZE=\"%i\" COLOR=\"#%06X\" LETTERSPACING=\"%i\" KERNING=\"%i\">", + format->font, format->size, format->color, (int)format->letter_spacing, + (format->kerning ? 1 : 0)); + fonts = g_slist_prepend (NULL, format); + + if (format->url != SWFDEC_AS_STR_EMPTY) +...

...ow a better suggestion > > > > --- a/core/fs/pxe/isr.c > > +++ b/core/fs/pxe/isr.c > > @@ -267,6 +267,7 @@ void pxe_start_isr(void) > > int hwad = ((int)MAC[0] << 16) + ((int)MAC[1] << 8) + MAC[2]; > > dprintf("pxe_start_isr: got %06x %04x\n", hwad, > pxe_undi_iface.ServiceFlags); > > if ((hwad == 0x000023ae) && (pxe_undi_iface.ServiceFlags == > > 0xdc1b) || > > + (hwad == 0x0000155d) && (pxe_undi_iface.ServiceFlags == > > + 0xdc1b) || > > (hwad...

Following a series of three patches, two of which have been sitting in my tree for a while, the third is the result of some inspection of an NV134 BIOS that seems to use the 0xaf upcode to upload training patterns. Please test! Roy Ps. Sorry they come from yet another e-mail address. My previous provider, eclipso, actively blocks users of git send-email. Inquiries fall on deaf ears, hence I

...e = therm->subdev.device; + const struct nvkm_therm_clkgate_pack *pack; + const struct nvkm_therm_clkgate_init *init; + u32 next, addr; + + pack_for_each_init(init, pack, p) { + next = init->addr + init->count * 8; + addr = init->addr; + + nvkm_trace(&therm->subdev, "{ 0x%06x, %d, 0x%08x }\n", + init->addr, init->count, init->data); + while (addr < next) { + nvkm_trace(&therm->subdev, "\t0x%06x = 0x%08x\n", + addr, init->data); + nvkm_wr32(device, addr, init->data); + addr += 8; + } + } +} + +static const struct...

> On Wed, Oct 07, 2015 at 01:58:51PM +0200, James Clements via Syslinux > wrote: > > On Wed, Oct 07, 2015 at 07:21:28AM -0400, Gene Cumm via Syslinux wrote: > > > On Wed, Oct 7, 2015 at 6:40 AM, Clements, James via Syslinux wrote: > > > > Hi, > > > > > > > > I am using a Windows Server 2012 R2 Hyper-V Generation 2 VM as a > > > >

https://bugs.freedesktop.org/show_bug.cgi?id=87554 Bug ID: 87554 Summary: [NV1A] 3.19-rc1 NULL dereference on modprobe in pramin_fini Product: xorg Version: unspecified Hardware: x86 (IA32) OS: Linux (All) Status: NEW Severity: major Priority: medium Component:

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ Some very important changes: - Fix gf100_clkgate_init() to actually write registers! This got broken in the last version by accident - Dump the register packs and the resulting register writes into

...* hotplug_slot */ > for (slot = 1; slot <= 31; slot++) { > push_block("Device", "S%i", slot); { > + printf("ACPI_EXTRACT_NAME_DWORD_CONST > aml_adr_dword\n"); > stmt("Name", "_ADR, %#06x0000", slot); > + printf("ACPI_EXTRACT_METHOD_STRING > aml_ej0_name\n"); > push_block("Method", "_EJ0,1"); { > stmt("Store", "ShiftLeft(1, %#06x), B0EJ", slot); >...

...pc = nv_rd32(dev, addr + 0x24); + oplow = nv_rd32(dev, addr + 0x70); + ophigh= nv_rd32(dev, addr + 0x74); + NV_INFO(dev, "PGRAPH_TRAP_MP_EXEC - " + "TP %d MP %d: ", tpid, i); + nouveau_print_enum_names(status, + nv50_mp_exec_error_names); + printk(" at %06x warp %d, opcode %08x %08x\n", + pc&0xffffff, pc >> 24, + oplow, ophigh); + } + nv_wr32(dev, addr + 0x10, mp10); + nv_wr32(dev, addr + 0x14, 0); + mps++; + } + if (!mps && display) + NV_INFO(dev, "PGRAPH_TRAP_MP_EXEC - TP %d: " + "No MPs claiming...

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ One small change: - Set therm->clkgate_enabled to false until the last patch, where we introduce the NvPmEnableGating option Lyude Paul (5): drm/nouveau: Add support for basic clockgating on