Displaying 2 results from an estimated 2 matches for "04d9c1a1100b".
2018 Sep 07
1
[PATCH] PCI: Reprogram bridge prefetch registers on resume
...you have a dmesg where you see the
> "restoring config space at offset" messages?
>
> Would it be reasonable to unconditionally write these registers in
> pci_restore_config_dword, like Windows does?
That sounds reasonable to me.
We did write them unconditionally, prior to 04d9c1a1100b ("[PATCH]
PCI: Improve PCI config space writeback") [1]. That commit apparently
fixed suspend on some laptop.
But at that time, we restored the config space in order of dword 0, 1,
2, ... 15, which means we restored the command register before the
BARs and windows, and it's conceiva...
2018 Sep 07
9
[PATCH] PCI: Reprogram bridge prefetch registers on resume
On 38+ Intel-based Asus products, the nvidia GPU becomes unusable
after S3 suspend/resume. The affected products include multiple
generations of nvidia GPUs and Intel SoCs. After resume, nouveau logs
many errors such as:
fifo: fault 00 [READ] at 0000005555555000 engine 00 [GR] client 04 [HUB/FE] reason 4a [] on channel -1 [007fa91000 unknown]
DRM: failed to idle channel 0 [DRM]