search for: 0406c

Displaying 9 results from an estimated 9 matches for "0406c".

Did you mean: 0406
2012 Sep 06
1
[LLVMdev] Unaligned vector memory access for ARM/NEON.
...ia r1, {d16, d17} > vldr d16, [r0, #8] > add r0, r1, #16 > vmovl.s16 q8, d16 > vstmia r0, {d16, d17} > bx lr > > Note that we're using a plain vldr instruction here to load the d register, not a vld1 instruction. Similarly for the stores. According to the ARM ARM (DDI 0406C), you're correct about the element size alignment requirement for VLD1, but our isel isn't attempting to use that instruction, but rather VLDR, which has word alignment required, so it falls over. > > Given that, it seems that the answer to your original question is that to improve...
2012 Sep 06
2
[LLVMdev] Unaligned vector memory access for ARM/NEON.
...mia r1, {d16, d17} > vldr d16, [r0, #8] > add r0, r1, #16 > vmovl.s16 q8, d16 > vstmia r0, {d16, d17} > bx lr > > Note that we're using a plain vldr instruction here to load the d register, not a vld1 instruction. Similarly for the stores. According to the ARM ARM (DDI 0406C), you're correct about the element size alignment requirement for VLD1, but our isel isn't attempting to use that instruction, but rather VLDR, which has word alignment required, so it falls over. > > Given that, it seems that the answer to your original question is that to improve c...
2012 Sep 06
0
[LLVMdev] Unaligned vector memory access for ARM/NEON.
...approach to solving the problem by modifying the logic in allowsUnalignedMemoryAccesses. As you and Jim mentioned, it looks like the vld1/vst1 instructions should support element aligned access for any armv7 implementation (I'm looking at Table A3-1 ARM Architecture Reference Manual - ARM DDI 0406C). Right now I do not think we have the correct code setup in ARMSubtarget to accurately represent this table. I would propose that we keep the existing field for unaligned access and add a new field for element-aligned access. The AllowsUnAlignedMem field remains as is and it could be used to rep...
2012 Sep 05
0
[LLVMdev] Unaligned vector memory access for ARM/NEON.
...d16, [r0] vmovl.s16 q8, d16 vstmia r1, {d16, d17} vldr d16, [r0, #8] add r0, r1, #16 vmovl.s16 q8, d16 vstmia r0, {d16, d17} bx lr Note that we're using a plain vldr instruction here to load the d register, not a vld1 instruction. Similarly for the stores. According to the ARM ARM (DDI 0406C), you're correct about the element size alignment requirement for VLD1, but our isel isn't attempting to use that instruction, but rather VLDR, which has word alignment required, so it falls over. Given that, it seems that the answer to your original question is that to improve codegen fo...
2012 Sep 06
2
[LLVMdev] Unaligned vector memory access for ARM/NEON.
...the problem by modifying the logic in allowsUnalignedMemoryAccesses. > > As you and Jim mentioned, it looks like the vld1/vst1 instructions should > support element aligned access for any armv7 implementation (I'm looking at > Table A3-1 ARM Architecture Reference Manual - ARM DDI 0406C). > > Right now I do not think we have the correct code setup in ARMSubtarget to > accurately represent this table. I would propose that we keep the existing > field for unaligned access and add a new field for element-aligned access. > > The AllowsUnAlignedMem field remains as...
2012 Sep 05
3
[LLVMdev] Unaligned vector memory access for ARM/NEON.
Hello Jim, Thank you for the response. I may be confused about the alignment rules here. I had been looking at the ARM RVCT Assembler Guide, which seems to indicate vld1.16 operates on 16-bit aligned data, unless I am misinterpreting their table (Table 5-11 in ARM DUI 0204H, pg 5-70,5-71). Prior to the table, It does mention the accesses need to be "element" aligned, where I took
2012 Sep 06
0
[LLVMdev] Unaligned vector memory access for ARM/NEON.
...he problem by modifying the logic in allowsUnalignedMemoryAccesses. > > As you and Jim mentioned, it looks like the vld1/vst1 instructions > should support element aligned access for any armv7 implementation > (I'm looking at Table A3-1 ARM Architecture Reference Manual - ARM DDI 0406C). > > Right now I do not think we have the correct code setup in > ARMSubtarget to accurately represent this table. I would propose that > we keep the existing field for unaligned access and add a new field for element-aligned access. > > The AllowsUnAlignedMem field remains a...
2012 Sep 07
2
[LLVMdev] Unaligned vector memory access for ARM/NEON.
...e logic in > allowsUnalignedMemoryAccesses. >> >> As you and Jim mentioned, it looks like the vld1/vst1 instructions >> should support element aligned access for any armv7 implementation >> (I'm looking at Table A3-1 ARM Architecture Reference Manual - ARM DDI > 0406C). >> >> Right now I do not think we have the correct code setup in >> ARMSubtarget to accurately represent this table. I would propose that >> we keep the existing field for unaligned access and add a new field for > element-aligned access. >> >> The Allow...
2012 Sep 07
0
[LLVMdev] Unaligned vector memory access for ARM/NEON.
...yAccesses. > >> > >> As you and Jim mentioned, it looks like the vld1/vst1 instructions > >> should support element aligned access for any armv7 implementation > >> (I'm looking at Table A3-1 ARM Architecture Reference Manual - ARM > >> DDI > > 0406C). > >> > >> Right now I do not think we have the correct code setup in > >> ARMSubtarget to accurately represent this table. I would propose that > >> we keep the existing field for unaligned access and add a new field > >> for > > element-aligned...