Displaying 2 results from an estimated 2 matches for "036bb809".
2018 Feb 08
0
[VLIW Scheduler] Itineraries vs. per operand scheduling
...there for the purpose of bootstrapping using ARM A9, since that was the latest in-tree ARM cpu at the time. It's just useless complexity now.
-Andy
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180207/036bb809/attachment.html>
2018 Feb 04
4
[VLIW Scheduler] Itineraries vs. per operand scheduling
Hi,
What is the best way to model a scheduler for a VLIW in-order architecture?
I've looked at the Hexagon and R600 architectures and they are using itineraries. I wanted to understand the benefit in using itineraries over the per operand scheduling.
I also found this thread from almost 2 years ago:
http://lists.llvm.org/pipermail/llvm-dev/2016-April/098763.html
At that time it seemed the