Displaying 3 results from an estimated 3 matches for "00c55781".
2012 Feb 13
0
[LLVMdev] Vectorization: Next Steps
I will test your suggestion, but I designed the test case to load the
memory directly into <4 x float> registers. So there is absolutely no
permutation and other swizzle or move operations. Maybe the heuristic
should not only count the depth but also the surrounding load/store
operations.
Are the load/store operations vectorized, too? (I designed the test case to
completely fit the SSE
2012 Feb 13
2
[LLVMdev] Vectorization: Next Steps
...Postdoctoral Appointee
Leadership Computing Facility
Argonne National Laboratory
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2012 Feb 10
2
[LLVMdev] Vectorization: Next Steps
Carl-Philip,
The reason that this does not vectorize is that it cannot vectorize the
stores; this leaves only the mul-add chains (and some chains with
loads), and they only have a depth of 2 (the threshold is 6).
If you give clang -mllvm -bb-vectorize-req-chain-depth=2 then it will
vectorize. The reason the heuristic has such a large default value is to
prevent cases where it costs more to