Nouveau - Nov 2025 - [PATCH 06/11] gpu: nova-core: add Turing boot registers

On 11/18/25 11:15 PM, Alexandre Courbot wrote:
> On Wed Nov 19, 2025 at 3:51 PM JST, John Hubbard wrote:
>> On 11/18/25 10:47 PM, Alexandre Courbot wrote:
>>> On Wed Nov 19, 2025 at 3:34 PM JST, John Hubbard wrote:
>>>> On 11/18/25 6:17 PM, Alexandre Courbot wrote:
>>>>> On Sat Nov 15, 2025 at 8:30 AM JST, Timur Tabi wrote:
>>>>>> Define some more GPU registers used to boot GSP-RM on
Turing and GA100.
>>>>>
>>>>> Nit (for the patch title): these are falcon registers, we
just happen to
>>>>> use them for booting the GSP. Also IIUC most of them also
exist outside
>>>>> of Turing.
>>>>
>>>> hmmm, falcon registers are *also* GPU registers, though. You
arrive here
>>>> via the GPU's PCIe BAR0. So I'm not sure there is
anything wrong with
>>>> Timur's patch title, right?
>>>
>>> I was referring to the email subject (which I should have quoted
for
>>> clarity): "gpu: nova-core: add Turing boot registers"
>>
>> Yes. But what's really wrong with that? You can't boot up
Turing without
>> booting up its GSP, which is accessed through registers that could
>> reasonably be referred to as GPU boot registers.
>>
>> I don't really think the patch title misleads, does it?
> 
> I interpreted the title as "these registers exist on Turing
only", but
> it is indeed subject to interpretation. In any case it is a
> non-important nit, so feel free to ignore if it parses fine.
Oh, I think I missed your point entirely. I think it's likely that
these registers really only apply to Turing, actually, because
we know that subsequent chips don't use them. (See: recent boot
success on Ampere/Ada, without these registers.)

Timur can clarify that.

thanks,
-- 
John Hubbard

On Tue, 2025-11-18 at 23:24 -0800, John Hubbard wrote:
> > I interpreted the title as "these registers exist on Turing
only", but
> > it is indeed subject to interpretation. In any case it is a
> > non-important nit, so feel free to ignore if it parses fine.
> 
> Oh, I think I missed your point entirely. I think it's likely that
> these registers really only apply to Turing, actually, because
> we know that subsequent chips don't use them. (See: recent boot
> success on Ampere/Ada, without these registers.)
> 
> Timur can clarify that.
Well, some of them exist only in Turing, and some of them are used only to boot
on Turing.

Last I checked, there's no HAL way to specify registers that exist only on
some architectures.  Is
that still the case?  I've added a comments for some registers to indicate
that.