Nouveau - Feb 2020 - [PATCH 3/4] drm/nouveau/kms/nv50-: Move 8BPC limit for MST into nv50_mstc_get_modes()

Currently, nouveau doesn't actually bother to try probing whether or not
it can actually handle interlaced modes over DisplayPort. As a result,
on volta and later we'll end up trying to set an interlaced mode even
when it's not supported and cause the front end for the display engine
to hang.

So, let's teach nouveau to reject interlaced modes on hardware that
can't actually handle it. Additionally for MST, since we accomplish this
by simply reusing more of the SST mode validation we also get (some)
basic bw validation for modes we detect on MST connectors completely for
free.

Lyude Paul (4):
  drm/nouveau/kms/nv50-: Probe SOR caps for DP interlacing support
  drm/nouveau/kms/gv100-: Add support for interlaced modes
  drm/nouveau/kms/nv50-: Move 8BPC limit for MST into
    nv50_mstc_get_modes()
  drm/nouveau/kms/nv50-: Share DP SST mode_valid() handling with MST

 drivers/gpu/drm/nouveau/dispnv50/disp.c     | 55 ++++++++++++++-------
 drivers/gpu/drm/nouveau/dispnv50/headc37d.c |  5 +-
 drivers/gpu/drm/nouveau/dispnv50/headc57d.c |  5 +-
 drivers/gpu/drm/nouveau/nouveau_connector.c | 43 ++++++++++------
 drivers/gpu/drm/nouveau/nouveau_connector.h |  5 ++
 drivers/gpu/drm/nouveau/nouveau_dp.c        | 27 ++++++++++
 drivers/gpu/drm/nouveau/nouveau_encoder.h   |  7 +++
 7 files changed, 108 insertions(+), 39 deletions(-)

-- 
2.24.1

Right now, we make the mistake of allowing interlacing on all
connectors. Nvidia hardware does not always support interlacing with DP
though, so we need to make sure that we don't allow interlaced modes to
be set in such situations as otherwise we'll end up accidentally hanging
the display HW.

This fixes some hangs with Turing, which would be caused by attempting
to set an interlaced mode on hardware that doesn't support it. This
patch likely fixes other hardware hanging in the same way as well.

Signed-off-by: Lyude Paul <lyude at redhat.com>
Cc: stable at vger.kernel.org
---
 drivers/gpu/drm/nouveau/dispnv50/disp.c     | 21 ++++++++++++++-------
 drivers/gpu/drm/nouveau/nouveau_connector.c | 10 +++++++++-
 drivers/gpu/drm/nouveau/nouveau_encoder.h   |  3 +++
 3 files changed, 26 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index a3dc2ba19fb2..32a1c4221f1e 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1714,6 +1714,9 @@ nv50_sor_create(struct drm_connector *connector, struct
dcb_output *dcbe)
 		struct nv50_disp *disp = nv50_disp(encoder->dev);
 		struct nvkm_i2c_aux *aux  			nvkm_i2c_aux_find(i2c, dcbe->i2c_index);
+		u32 caps = nvif_rd32(&disp->disp->object,
+				     0x00640144 + (nv_encoder->or * 8));
+
 		if (aux) {
 			if (disp->disp->object.oclass < GF110_DISP) {
 				/* HW has no support for address-only
@@ -1727,13 +1730,17 @@ nv50_sor_create(struct drm_connector *connector, struct
dcb_output *dcbe)
 			nv_encoder->aux = aux;
 		}
 
-		if (nv_connector->type != DCB_CONNECTOR_eDP &&
-		    nv50_has_mst(drm)) {
-			ret = nv50_mstm_new(nv_encoder, &nv_connector->aux,
-					    16, nv_connector->base.base.id,
-					    &nv_encoder->dp.mstm);
-			if (ret)
-				return ret;
+		if (nv_connector->type != DCB_CONNECTOR_eDP) {
+			if (nv50_has_mst(drm)) {
+				ret = nv50_mstm_new(nv_encoder,
+						    &nv_connector->aux,
+						    16,
+						    connector->base.id,
+						    &nv_encoder->dp.mstm);
+				if (ret)
+					return ret;
+			}
+			nv_encoder->dp.caps.interlace = !!(caps & 0x04000000);
 		}
 	} else {
 		struct nvkm_i2c_bus *bus diff --git
a/drivers/gpu/drm/nouveau/nouveau_connector.c
b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 9a9a7f5003d3..97a84daf8eab 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -509,7 +509,11 @@ nouveau_connector_set_encoder(struct drm_connector
*connector,
 	nv_connector->detected_encoder = nv_encoder;
 
 	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
-		connector->interlace_allowed = true;
+		if (nv_encoder->dcb->type == DCB_OUTPUT_DP)
+			connector->interlace_allowed +				nv_encoder->dp.caps.interlace;
+		else
+			connector->interlace_allowed = true;
 		connector->doublescan_allowed = true;
 	} else
 	if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS ||
@@ -1060,6 +1064,10 @@ nouveau_connector_mode_valid(struct drm_connector
*connector,
 	case DCB_OUTPUT_TV:
 		return get_slave_funcs(encoder)->mode_valid(encoder, mode);
 	case DCB_OUTPUT_DP:
+		if (mode->flags & DRM_MODE_FLAG_INTERLACE &&
+		    !nv_encoder->dp.caps.interlace)
+			return MODE_NO_INTERLACE;
+
 		max_clock  = nv_encoder->dp.link_nr;
 		max_clock *= nv_encoder->dp.link_bw;
 		clock = clock * (connector->display_info.bpc * 3) / 10;
diff --git a/drivers/gpu/drm/nouveau/nouveau_encoder.h
b/drivers/gpu/drm/nouveau/nouveau_encoder.h
index 3517f920bf89..2a8a7aec48c4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_encoder.h
+++ b/drivers/gpu/drm/nouveau/nouveau_encoder.h
@@ -63,6 +63,9 @@ struct nouveau_encoder {
 			struct nv50_mstm *mstm;
 			int link_nr;
 			int link_bw;
+			struct {
+				bool interlace : 1;
+			} caps;
 		} dp;
 	};
 
-- 
2.24.1

We advertise being able to set interlaced modes, so let's actually make
sure to do that. Otherwise, we'll end up hanging the display engine due
to trying to set a mode with timings adjusted for interlacing without
telling the hardware it's actually an interlaced mode.

Signed-off-by: Lyude Paul <lyude at redhat.com>
Cc: stable at vger.kernel.org
---
 drivers/gpu/drm/nouveau/dispnv50/headc37d.c | 5 +++--
 drivers/gpu/drm/nouveau/dispnv50/headc57d.c | 5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c
b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c
index 00011ce109a6..4a9a32b89f74 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c
@@ -168,14 +168,15 @@ headc37d_mode(struct nv50_head *head, struct
nv50_head_atom *asyh)
 	struct nv50_dmac *core =
&nv50_disp(head->base.base.dev)->core->chan;
 	struct nv50_head_mode *m = &asyh->mode;
 	u32 *push;
-	if ((push = evo_wait(core, 12))) {
+	if ((push = evo_wait(core, 13))) {
 		evo_mthd(push, 0x2064 + (head->base.index * 0x400), 5);
 		evo_data(push, (m->v.active  << 16) | m->h.active );
 		evo_data(push, (m->v.synce   << 16) | m->h.synce  );
 		evo_data(push, (m->v.blanke  << 16) | m->h.blanke );
 		evo_data(push, (m->v.blanks  << 16) | m->h.blanks );
 		evo_data(push, (m->v.blank2e << 16) | m->v.blank2s);
-		evo_mthd(push, 0x200c + (head->base.index * 0x400), 1);
+		evo_mthd(push, 0x2008 + (head->base.index * 0x400), 2);
+		evo_data(push, m->interlace);
 		evo_data(push, m->clock * 1000);
 		evo_mthd(push, 0x2028 + (head->base.index * 0x400), 1);
 		evo_data(push, m->clock * 1000);
diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc57d.c
b/drivers/gpu/drm/nouveau/dispnv50/headc57d.c
index 938d910a1b1e..859131a8bc3c 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/headc57d.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/headc57d.c
@@ -173,14 +173,15 @@ headc57d_mode(struct nv50_head *head, struct
nv50_head_atom *asyh)
 	struct nv50_dmac *core =
&nv50_disp(head->base.base.dev)->core->chan;
 	struct nv50_head_mode *m = &asyh->mode;
 	u32 *push;
-	if ((push = evo_wait(core, 12))) {
+	if ((push = evo_wait(core, 13))) {
 		evo_mthd(push, 0x2064 + (head->base.index * 0x400), 5);
 		evo_data(push, (m->v.active  << 16) | m->h.active );
 		evo_data(push, (m->v.synce   << 16) | m->h.synce  );
 		evo_data(push, (m->v.blanke  << 16) | m->h.blanke );
 		evo_data(push, (m->v.blanks  << 16) | m->h.blanks );
 		evo_data(push, (m->v.blank2e << 16) | m->v.blank2s);
-		evo_mthd(push, 0x200c + (head->base.index * 0x400), 1);
+		evo_mthd(push, 0x2008 + (head->base.index * 0x400), 2);
+		evo_data(push, m->interlace);
 		evo_data(push, m->clock * 1000);
 		evo_mthd(push, 0x2028 + (head->base.index * 0x400), 1);
 		evo_data(push, m->clock * 1000);
-- 
2.24.1

This just limits the BPC for MST connectors to a maximum of 8 from
nv50_mstc_get_modes(), instead of doing so during
nv50_msto_atomic_check(). This doesn't introduce any functional changes
yet (other then userspace now lying about the max bpc, but we can't
support that yet anyway so meh). But, we'll need this in a moment so
that we can share mode validation between SST and MST which will fix
some real world issues.

Signed-off-by: Lyude Paul <lyude at redhat.com>
Cc: stable at vger.kernel.org
---
 drivers/gpu/drm/nouveau/dispnv50/disp.c | 25 ++++++++++++++-----------
 1 file changed, 14 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 32a1c4221f1e..766b8e80a8f5 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -903,15 +903,9 @@ nv50_msto_atomic_check(struct drm_encoder *encoder,
 	if (!state->duplicated) {
 		const int clock = crtc_state->adjusted_mode.clock;
 
-		/*
-		 * XXX: Since we don't use HDR in userspace quite yet, limit
-		 * the bpc to 8 to save bandwidth on the topology. In the
-		 * future, we'll want to properly fix this by dynamically
-		 * selecting the highest possible bpc that would fit in the
-		 * topology
-		 */
-		asyh->or.bpc = min(connector->display_info.bpc, 8U);
-		asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, asyh->or.bpc * 3, false);
+		asyh->or.bpc = connector->display_info.bpc;
+		asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, asyh->or.bpc * 3,
+						    false);
 	}
 
 	slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr, mstc->port,
@@ -1071,8 +1065,17 @@ nv50_mstc_get_modes(struct drm_connector *connector)
 	if (mstc->edid)
 		ret = drm_add_edid_modes(&mstc->connector, mstc->edid);
 
-	if (!mstc->connector.display_info.bpc)
-		mstc->connector.display_info.bpc = 8;
+	/*
+	 * XXX: Since we don't use HDR in userspace quite yet, limit the bpc
+	 * to 8 to save bandwidth on the topology. In the future, we'll want
+	 * to properly fix this by dynamically selecting the highest possible
+	 * bpc that would fit in the topology
+	 */
+	if (connector->display_info.bpc)
+		connector->display_info.bpc +			clamp(connector->display_info.bpc, 6U,
8U);
+	else
+		connector->display_info.bpc = 8;
 
 	if (mstc->native)
 		drm_mode_destroy(mstc->connector.dev, mstc->native);
-- 
2.24.1

Currently, the nv50_mstc_mode_valid() function is happy to take any and
all modes, even the ones we can't actually support sometimes like
interlaced modes.

Luckily, the only difference between the mode validation that needs to
be performed for MST vs. SST is that eventually we'll need to check the
minimum PBN against the MSTB's full PBN capabilities (remember-we don't
care about the current bw state here). Otherwise, all of the other code
can be shared.

So, we move all of the common mode validation in
nouveau_connector_mode_valid() into a separate helper,
nv50_dp_mode_valid(), and use that from both nv50_mstc_mode_valid() and
nouveau_connector_mode_valid(). Note that we allow for returning the
calculated clock that nv50_dp_mode_valid() came up with, since we'll
eventually want to use that for PBN calculation in
nv50_mstc_mode_valid().

Signed-off-by: Lyude Paul <lyude at redhat.com>
Cc: stable at vger.kernel.org
---
 drivers/gpu/drm/nouveau/dispnv50/disp.c     |  9 ++++-
 drivers/gpu/drm/nouveau/nouveau_connector.c | 41 +++++++++++----------
 drivers/gpu/drm/nouveau/nouveau_connector.h |  5 +++
 drivers/gpu/drm/nouveau/nouveau_dp.c        | 27 ++++++++++++++
 drivers/gpu/drm/nouveau/nouveau_encoder.h   |  4 ++
 5 files changed, 66 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 766b8e80a8f5..65b0655ff3c5 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1051,7 +1051,14 @@ static enum drm_mode_status
 nv50_mstc_mode_valid(struct drm_connector *connector,
 		     struct drm_display_mode *mode)
 {
-	return MODE_OK;
+	struct nv50_mstc *mstc = nv50_mstc(connector);
+	struct nouveau_encoder *outp = mstc->mstm->outp;
+
+	/* TODO: calculate the PBN from the dotclock and validate against the
+	 * MSTB's max possible PBN
+	 */
+
+	return nv50_dp_mode_valid(connector, outp, mode, NULL);
 }
 
 static int
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c
b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 97a84daf8eab..3a3e1533d3e7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -38,6 +38,7 @@
 #include "nouveau_reg.h"
 #include "nouveau_drv.h"
 #include "dispnv04/hw.h"
+#include "dispnv50/disp.h"
 #include "nouveau_acpi.h"
 
 #include "nouveau_display.h"
@@ -1033,6 +1034,24 @@ get_tmds_link_bandwidth(struct drm_connector *connector)
 		return 112000 * duallink_scale;
 }
 
+enum drm_mode_status
+nouveau_conn_mode_clock_valid(const struct drm_display_mode *mode,
+			      const unsigned min_clock,
+			      const unsigned max_clock,
+			      unsigned *clock)
+{
+	if ((mode->flags & DRM_MODE_FLAG_3D_MASK) =+	   
DRM_MODE_FLAG_3D_FRAME_PACKING)
+		*clock *= 2;
+
+	if (*clock < min_clock)
+		return MODE_CLOCK_LOW;
+	if (*clock > max_clock)
+		return MODE_CLOCK_HIGH;
+
+	return MODE_OK;
+}
+
 static enum drm_mode_status
 nouveau_connector_mode_valid(struct drm_connector *connector,
 			     struct drm_display_mode *mode)
@@ -1041,7 +1060,6 @@ nouveau_connector_mode_valid(struct drm_connector
*connector,
 	struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder;
 	struct drm_encoder *encoder = to_drm_encoder(nv_encoder);
 	unsigned min_clock = 25000, max_clock = min_clock;
-	unsigned clock = mode->clock;
 
 	switch (nv_encoder->dcb->type) {
 	case DCB_OUTPUT_LVDS:
@@ -1064,29 +1082,14 @@ nouveau_connector_mode_valid(struct drm_connector
*connector,
 	case DCB_OUTPUT_TV:
 		return get_slave_funcs(encoder)->mode_valid(encoder, mode);
 	case DCB_OUTPUT_DP:
-		if (mode->flags & DRM_MODE_FLAG_INTERLACE &&
-		    !nv_encoder->dp.caps.interlace)
-			return MODE_NO_INTERLACE;
-
-		max_clock  = nv_encoder->dp.link_nr;
-		max_clock *= nv_encoder->dp.link_bw;
-		clock = clock * (connector->display_info.bpc * 3) / 10;
-		break;
+		return nv50_dp_mode_valid(connector, nv_encoder, mode, NULL);
 	default:
 		BUG();
 		return MODE_BAD;
 	}
 
-	if ((mode->flags & DRM_MODE_FLAG_3D_MASK) ==
DRM_MODE_FLAG_3D_FRAME_PACKING)
-		clock *= 2;
-
-	if (clock < min_clock)
-		return MODE_CLOCK_LOW;
-
-	if (clock > max_clock)
-		return MODE_CLOCK_HIGH;
-
-	return MODE_OK;
+	return nouveau_conn_mode_clock_valid(mode, min_clock, max_clock,
+					     NULL);
 }
 
 static struct drm_encoder *
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.h
b/drivers/gpu/drm/nouveau/nouveau_connector.h
index de84fb4708c7..9e062c7adec8 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.h
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.h
@@ -195,6 +195,11 @@ int nouveau_conn_atomic_get_property(struct drm_connector
*,
 				     const struct drm_connector_state *,
 				     struct drm_property *, u64 *);
 struct drm_display_mode *nouveau_conn_native_mode(struct drm_connector *);
+enum drm_mode_status
+nouveau_conn_mode_clock_valid(const struct drm_display_mode *,
+			      const unsigned min_clock,
+			      const unsigned max_clock,
+			      unsigned *clock);
 
 #ifdef CONFIG_DRM_NOUVEAU_BACKLIGHT
 extern int nouveau_backlight_init(struct drm_connector *);
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
b/drivers/gpu/drm/nouveau/nouveau_dp.c
index 2674f1587457..5cba2a23781d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -98,3 +98,30 @@ nouveau_dp_detect(struct nouveau_encoder *nv_encoder)
 		return NOUVEAU_DP_SST;
 	return ret;
 }
+
+/* TODO:
+ * Use the minimum possible BPC here, once we add support for the max bpc
+ * property.
+ */
+enum drm_mode_status
+nv50_dp_mode_valid(struct drm_connector *connector,
+		   struct nouveau_encoder *outp,
+		   const struct drm_display_mode *mode,
+		   unsigned *out_clock)
+{
+	const unsigned min_clock = 25000;
+	unsigned max_clock, clock;
+	enum drm_mode_status ret;
+
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE &&
!outp->dp.caps.interlace)
+		return MODE_NO_INTERLACE;
+
+	max_clock = outp->dp.link_nr * outp->dp.link_bw;
+	clock = mode->clock * (connector->display_info.bpc * 3) / 10;
+
+	ret = nouveau_conn_mode_clock_valid(mode, min_clock, max_clock,
+					    &clock);
+	if (out_clock)
+		*out_clock = clock;
+	return ret;
+}
diff --git a/drivers/gpu/drm/nouveau/nouveau_encoder.h
b/drivers/gpu/drm/nouveau/nouveau_encoder.h
index 2a8a7aec48c4..e6e782d81330 100644
--- a/drivers/gpu/drm/nouveau/nouveau_encoder.h
+++ b/drivers/gpu/drm/nouveau/nouveau_encoder.h
@@ -103,6 +103,10 @@ enum nouveau_dp_status {
 };
 
 int nouveau_dp_detect(struct nouveau_encoder *);
+enum drm_mode_status nv50_dp_mode_valid(struct drm_connector *,
+					struct nouveau_encoder *,
+					const struct drm_display_mode *,
+					unsigned *clock);
 
 struct nouveau_connector *
 nouveau_encoder_connector_get(struct nouveau_encoder *encoder);
-- 
2.24.1

Hi,

[This is an automated email]

This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all

The bot has tested the following trees: v5.5.3, v5.4.19, v4.19.103, v4.14.170,
v4.9.213, v4.4.213.

v5.5.3: Failed to apply! Possible dependencies:
    3261e013c0ca ("drm/amd/display: Add MST atomic routines")
    dc48529fb14e ("drm/dp_mst: Add PBN calculation for DSC modes")

v5.4.19: Failed to apply! Possible dependencies:
    14692a3637d4 ("drm/dp_mst: Add probe_lock")
    3261e013c0ca ("drm/amd/display: Add MST atomic routines")
    37dfdc55ffeb ("drm/dp_mst: Cleanup drm_dp_send_link_address() a
bit")
    3f9b3f02dda5 ("drm/dp_mst: Protect drm_dp_mst_port members with
locking")
    50094b5dcd32 ("drm/dp_mst: Destroy topology_mgr mutexes")
    5950f0b797fc ("drm/dp_mst: Move link address dumping into a
function")
    60f9ae9d0d3d ("drm/dp_mst: Remove huge conditional in
drm_dp_mst_handle_up_req()")
    7cb12d48314e ("drm/dp_mst: Destroy MSTBs asynchronously")
    9408cc94eb04 ("drm/dp_mst: Handle UP requests asynchronously")
    a29d881875fc ("drm/dp_mst: Refactor drm_dp_mst_handle_up_req()")
    c485e2c97dae ("drm/dp_mst: Refactor pdt setup/teardown, add more
locking")
    caf81ec6cd72 ("drm: Destroy the correct mutex name in
drm_dp_mst_topology_mgr_destroy")
    dc48529fb14e ("drm/dp_mst: Add PBN calculation for DSC modes")
    e2839ff692c6 ("drm/dp_mst: Rename drm_dp_add_port and
drm_dp_update_port")

v4.19.103: Failed to apply! Possible dependencies:
    232c9eec417a ("drm/nouveau: Use atomic VCPI helpers for MST")
    310d35771ee9 ("drm/nouveau/kms/nv50-: Call outp_atomic_check_view()
before handling PBN")
    39b50c603878 ("drm/atomic_helper: Stop modesets on unregistered
connectors harder")
    412e85b60531 ("drm/nouveau: Only release VCPI slots on mode
changes")
    706246c761dd ("drm/dp_mst: Refactor
drm_dp_update_payload_part1()")
    72fdb40c1a4b ("drm: extract drm_atomic_uapi.c")
    7f4de521001f ("drm/atomic: Add __drm_atomic_helper_plane_reset")
    88ec89adec36 ("drm/nouveau: Move PBN and VCPI allocation into
nv50_head_atom")
    a3d15c4b0ecd ("drm/dp_mst: Remove port validation in
drm_dp_atomic_find_vcpi_slots()")
    a5ec8332d428 ("drm: Add per-plane pixel blend mode property")
    bea5c38f1eb6 ("drm/dp_mst: Add some atomic state iterator macros")
    d0757afd00d7 ("drm/dp_mst: Rename
drm_dp_mst_get_validated_(port|mstb)_ref and friends")
    d86552efe10a ("drm/atomic: trim driver interface/docs")
    db1231ddc046 ("drm/nouveau: Only recalculate PBN/VCPI on mode/connector
changes")
    ebcc0e6b5091 ("drm/dp_mst: Introduce new refcounting scheme for mstbs
and ports")
    eceae1472467 ("drm/dp_mst: Start tracking per-port VCPI
allocations")
    fc63668656bd ("drm/dp_mst: Remove bogus conditional in
drm_dp_update_payload_part1()")

v4.14.170: Failed to apply! Possible dependencies:
    07bbc1c5f49b ("drm/nouveau/core/memory: split info pointers from
accessor pointers")
    0b11b30de9d2 ("drm/nouveau/mmu/nv04-nv4x: move global vmm to
nvkm_mmu")
    0f43715fac00 ("drm/nouveau/mmu/g84: fork from nv50")
    1590700d94ac ("drm/nouveau/kms/nv50-: split each resource type into
their own source files")
    269fe32d3343 ("drm/nouveau/bar: swap oneinit/init ordering, and rename
bar3 to bar2")
    30ed49b55b6e ("drm/nouveau/kms/nv50-: move code underneath
dispnv50/")
    310d35771ee9 ("drm/nouveau/kms/nv50-: Call outp_atomic_check_view()
before handling PBN")
    5b17f3624efa ("drm/nouveau/mmu/nv04: implement vmm on top of new
base")
    5e075fdeb166 ("drm/nouveau/mmu: automatically handle
"un-bootstrapping" of vmm")
    6359c982243e ("drm/nouveau/mmu/gp10b: fork from gf100")
    7f53d6dc9a72 ("drm/nouveau/core/memory: comptag allocation")
    806a73356537 ("drm/nouveau/mmu: implement base for new vm
management")
    88ec89adec36 ("drm/nouveau: Move PBN and VCPI allocation into
nv50_head_atom")
    997a89003c2d ("drm/nouveau/core/memory: add reference counting")
    b86a45877ead ("drm/nouveau/mmu/gp100: fork from gf100")
    c83c4097eba8 ("drm/nouveau/mmu: define user interfaces to mmu memory
allocation")
    cedc4d57df26 ("drm/nouveau/mmu/gm20b: fork from gf100")
    d1f6c8d2e9df ("drm/nouveau/mmu/gk20a: fork from gf100")
    db018585a51a ("drm/nouveau/mmu/gk104: fork from gf100")
    db1231ddc046 ("drm/nouveau: Only recalculate PBN/VCPI on mode/connector
changes")
    e1e33c791a23 ("drm/nouveau/mmu/gm200: fork from gf100")
    e69dae85c90b ("drm/nouveau/bar/nv50,g84: drop mmu invalidate")
    eaf1a69110f4 ("drm/nouveau/mmu: add base for type-based memory
allocation")
    f5650478ab07 ("drm/nouveau/disp/nv50-: pass nvkm_memory objects for
channel push buffers")

v4.9.213: Failed to apply! Possible dependencies:
    310d35771ee9 ("drm/nouveau/kms/nv50-: Call outp_atomic_check_view()
before handling PBN")
    3dbd036b8419 ("drm/nouveau/kms/nv50: separate out mode commit")
    52aa30f2524d ("drm/nouveau/kms/nv50: switch mst sink back into sst
mode")
    6bbab3b6b656 ("drm/nouveau/kms/nv50: separate out base/ovly channel
usage bounds commit")
    7e91833dfb2d ("drm/nouveau/kms/nv50: separate out dither commit")
    839ca903f12e ("drm/nouveau/kms/nv50: transition to atomic interfaces
internally")
    973f10c2d3ea ("drm/nouveau/kms/nv50: separate out base channel
commit")
    ad6336195393 ("drm/nouveau/kms/nv50: separate out core surface
commit")
    ea8ee39002a1 ("drm/nouveau/kms/nv50: separate out cursor surface
commit")
    f479c0ba4a17 ("drm/nouveau/kms/nv50: initial support for DP 1.2
multi-stream")

v4.4.213: Failed to apply! Possible dependencies:
    13a3d91f17a5 ("drm: Pass 'name' to drm_encoder_init()")
    310d35771ee9 ("drm/nouveau/kms/nv50-: Call outp_atomic_check_view()
before handling PBN")
    3dbd036b8419 ("drm/nouveau/kms/nv50: separate out mode commit")
    52aa30f2524d ("drm/nouveau/kms/nv50: switch mst sink back into sst
mode")
    7568b1067181 ("drm/nouveau/nvif: split out display interface
definitions")
    839ca903f12e ("drm/nouveau/kms/nv50: transition to atomic interfaces
internally")
    973f10c2d3ea ("drm/nouveau/kms/nv50: separate out base channel
commit")
    ad6336195393 ("drm/nouveau/kms/nv50: separate out core surface
commit")
    b516a9efb7af ("drm: Move LEAVE/ENTER_ATOMIC_MODESET to fbdev
helpers")
    f479c0ba4a17 ("drm/nouveau/kms/nv50: initial support for DP 1.2
multi-stream")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?

-- 
Thanks,
Sasha

Hi,

[This is an automated email]

This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all

The bot has tested the following trees: v5.5.3, v5.4.19, v4.19.103, v4.14.170,
v4.9.213, v4.4.213.

v5.5.3: Failed to apply! Possible dependencies:
    5ff0cb1ce253 ("drm/nouveau/kms/nv50-: Use less encoders by making mstos
per-head")
    f7b0325ecccc ("drm/nouveau/kms/nv50-: Probe SOR caps for DP interlacing
support")

v5.4.19: Failed to apply! Possible dependencies:
    5ff0cb1ce253 ("drm/nouveau/kms/nv50-: Use less encoders by making mstos
per-head")
    f7b0325ecccc ("drm/nouveau/kms/nv50-: Probe SOR caps for DP interlacing
support")

v4.19.103: Failed to apply! Possible dependencies:
    5e292e7646ef ("drm/nouveau: Remove unnecessary VCPI checks in
nv50_msto_cleanup()")
    5ff0cb1ce253 ("drm/nouveau/kms/nv50-: Use less encoders by making mstos
per-head")
    6d757753cef8 ("drm/nouveau: Move backlight device into
nouveau_connector")
    f7b0325ecccc ("drm/nouveau/kms/nv50-: Probe SOR caps for DP interlacing
support")

v4.14.170: Failed to apply! Possible dependencies:
    07bbc1c5f49b ("drm/nouveau/core/memory: split info pointers from
accessor pointers")
    0b11b30de9d2 ("drm/nouveau/mmu/nv04-nv4x: move global vmm to
nvkm_mmu")
    11fc017dfb1e ("drm/nouveau/kms/nv50: prepare for double-buffered
LUTs")
    1590700d94ac ("drm/nouveau/kms/nv50-: split each resource type into
their own source files")
    269fe32d3343 ("drm/nouveau/bar: swap oneinit/init ordering, and rename
bar3 to bar2")
    30ed49b55b6e ("drm/nouveau/kms/nv50-: move code underneath
dispnv50/")
    34508f9d260c ("drm/nouveau/kms/nv50-: determine MST support from DP
Info Table")
    54b202f1d830 ("drm/nouveau: fix mode_valid's return type")
    5b17f3624efa ("drm/nouveau/mmu/nv04: implement vmm on top of new
base")
    5e075fdeb166 ("drm/nouveau/mmu: automatically handle
"un-bootstrapping" of vmm")
    698c1aa9f83b ("drm/nouveau/kms/nv50-: Don't create MSTMs for eDP
connectors")
    7f53d6dc9a72 ("drm/nouveau/core/memory: comptag allocation")
    806a73356537 ("drm/nouveau/mmu: implement base for new vm
management")
    90df522912ac ("drm/nouveau/kms/nv50: use INTERPOLATE_257_UNITY_RANGE
LUT on newer chipsets")
    997a89003c2d ("drm/nouveau/core/memory: add reference counting")
    c83c4097eba8 ("drm/nouveau/mmu: define user interfaces to mmu memory
allocation")
    e69dae85c90b ("drm/nouveau/bar/nv50,g84: drop mmu invalidate")
    e75182f68b7b ("drm/nouveau/kms/nv50: use "low res" lut for
indexed mode")
    eaf1a69110f4 ("drm/nouveau/mmu: add base for type-based memory
allocation")
    f4778f08a038 ("drm/nouveau/kms/nv50: fix handling of gamma since atomic
conversion")
    f5650478ab07 ("drm/nouveau/disp/nv50-: pass nvkm_memory objects for
channel push buffers")
    f7b0325ecccc ("drm/nouveau/kms/nv50-: Probe SOR caps for DP interlacing
support")

v4.9.213: Failed to apply! Possible dependencies:
    3dbd036b8419 ("drm/nouveau/kms/nv50: separate out mode commit")
    52aa30f2524d ("drm/nouveau/kms/nv50: switch mst sink back into sst
mode")
    6bbab3b6b656 ("drm/nouveau/kms/nv50: separate out base/ovly channel
usage bounds commit")
    7e91833dfb2d ("drm/nouveau/kms/nv50: separate out dither commit")
    839ca903f12e ("drm/nouveau/kms/nv50: transition to atomic interfaces
internally")
    973f10c2d3ea ("drm/nouveau/kms/nv50: separate out base channel
commit")
    ad6336195393 ("drm/nouveau/kms/nv50: separate out core surface
commit")
    ea8ee39002a1 ("drm/nouveau/kms/nv50: separate out cursor surface
commit")
    f479c0ba4a17 ("drm/nouveau/kms/nv50: initial support for DP 1.2
multi-stream")

v4.4.213: Failed to apply! Possible dependencies:
    13a3d91f17a5 ("drm: Pass 'name' to drm_encoder_init()")
    3dbd036b8419 ("drm/nouveau/kms/nv50: separate out mode commit")
    52aa30f2524d ("drm/nouveau/kms/nv50: switch mst sink back into sst
mode")
    7568b1067181 ("drm/nouveau/nvif: split out display interface
definitions")
    839ca903f12e ("drm/nouveau/kms/nv50: transition to atomic interfaces
internally")
    973f10c2d3ea ("drm/nouveau/kms/nv50: separate out base channel
commit")
    ad6336195393 ("drm/nouveau/kms/nv50: separate out core surface
commit")
    b516a9efb7af ("drm: Move LEAVE/ENTER_ATOMIC_MODESET to fbdev
helpers")
    f479c0ba4a17 ("drm/nouveau/kms/nv50: initial support for DP 1.2
multi-stream")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?

-- 
Thanks,
Sasha

Hi,

[This is an automated email]

This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all

The bot has tested the following trees: v5.5.3, v5.4.19, v4.19.103, v4.14.170,
v4.9.213, v4.4.213.

v5.5.3: Build OK!
v5.4.19: Build OK!
v4.19.103: Failed to apply! Possible dependencies:
    563737c525ea ("drm/nouveau/kms/tu104: initial support")

v4.14.170: Failed to apply! Possible dependencies:
    07bbc1c5f49b ("drm/nouveau/core/memory: split info pointers from
accessor pointers")
    09e1b78aab57 ("drm/nouveau/kms/nv50-: split core implementation by
hardware class")
    0b11b30de9d2 ("drm/nouveau/mmu/nv04-nv4x: move global vmm to
nvkm_mmu")
    0f43715fac00 ("drm/nouveau/mmu/g84: fork from nv50")
    1590700d94ac ("drm/nouveau/kms/nv50-: split each resource type into
their own source files")
    269fe32d3343 ("drm/nouveau/bar: swap oneinit/init ordering, and rename
bar3 to bar2")
    30ed49b55b6e ("drm/nouveau/kms/nv50-: move code underneath
dispnv50/")
    5b17f3624efa ("drm/nouveau/mmu/nv04: implement vmm on top of new
base")
    5e075fdeb166 ("drm/nouveau/mmu: automatically handle
"un-bootstrapping" of vmm")
    6359c982243e ("drm/nouveau/mmu/gp10b: fork from gf100")
    7f53d6dc9a72 ("drm/nouveau/core/memory: comptag allocation")
    806a73356537 ("drm/nouveau/mmu: implement base for new vm
management")
    997a89003c2d ("drm/nouveau/core/memory: add reference counting")
    b86a45877ead ("drm/nouveau/mmu/gp100: fork from gf100")
    c83c4097eba8 ("drm/nouveau/mmu: define user interfaces to mmu memory
allocation")
    cedc4d57df26 ("drm/nouveau/mmu/gm20b: fork from gf100")
    d1f6c8d2e9df ("drm/nouveau/mmu/gk20a: fork from gf100")
    db018585a51a ("drm/nouveau/mmu/gk104: fork from gf100")
    e1e33c791a23 ("drm/nouveau/mmu/gm200: fork from gf100")
    e69dae85c90b ("drm/nouveau/bar/nv50,g84: drop mmu invalidate")
    eaf1a69110f4 ("drm/nouveau/mmu: add base for type-based memory
allocation")
    f5650478ab07 ("drm/nouveau/disp/nv50-: pass nvkm_memory objects for
channel push buffers")
    facaed62b4cb ("drm/nouveau/kms/gv100: initial support")

v4.9.213: Failed to apply! Possible dependencies:
    09e1b78aab57 ("drm/nouveau/kms/nv50-: split core implementation by
hardware class")
    1590700d94ac ("drm/nouveau/kms/nv50-: split each resource type into
their own source files")
    30ed49b55b6e ("drm/nouveau/kms/nv50-: move code underneath
dispnv50/")
    34fd3e5d8c5f ("drm/nouveau: Pass mode-dependent AVI and Vendor HDMI
InfoFrames to NVKM")
    3dbd036b8419 ("drm/nouveau/kms/nv50: separate out mode commit")
    52aa30f2524d ("drm/nouveau/kms/nv50: switch mst sink back into sst
mode")
    5a223daccbf3 ("drm/nouveau/kms/nv50: give more useful names to
encoders")
    973f10c2d3ea ("drm/nouveau/kms/nv50: separate out base channel
commit")
    ad6336195393 ("drm/nouveau/kms/nv50: separate out core surface
commit")
    f20c665ca04a ("drm/nouveau/kms/nv50: clean-up encoder functions")
    facaed62b4cb ("drm/nouveau/kms/gv100: initial support")

v4.4.213: Failed to apply! Possible dependencies:
    09e1b78aab57 ("drm/nouveau/kms/nv50-: split core implementation by
hardware class")
    13a3d91f17a5 ("drm: Pass 'name' to drm_encoder_init()")
    1590700d94ac ("drm/nouveau/kms/nv50-: split each resource type into
their own source files")
    30ed49b55b6e ("drm/nouveau/kms/nv50-: move code underneath
dispnv50/")
    34fd3e5d8c5f ("drm/nouveau: Pass mode-dependent AVI and Vendor HDMI
InfoFrames to NVKM")
    3dbd036b8419 ("drm/nouveau/kms/nv50: separate out mode commit")
    52aa30f2524d ("drm/nouveau/kms/nv50: switch mst sink back into sst
mode")
    5a223daccbf3 ("drm/nouveau/kms/nv50: give more useful names to
encoders")
    ad6336195393 ("drm/nouveau/kms/nv50: separate out core surface
commit")
    b516a9efb7af ("drm: Move LEAVE/ENTER_ATOMIC_MODESET to fbdev
helpers")
    f20c665ca04a ("drm/nouveau/kms/nv50: clean-up encoder functions")
    facaed62b4cb ("drm/nouveau/kms/gv100: initial support")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?

-- 
Thanks,
Sasha

Hi,

[This is an automated email]

This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all

The bot has tested the following trees: v5.5.3, v5.4.19, v4.19.103, v4.14.170,
v4.9.213, v4.4.213.

v5.5.3: Failed to apply! Possible dependencies:
    5ff0cb1ce253 ("drm/nouveau/kms/nv50-: Use less encoders by making mstos
per-head")

v5.4.19: Failed to apply! Possible dependencies:
    5ff0cb1ce253 ("drm/nouveau/kms/nv50-: Use less encoders by making mstos
per-head")

v4.19.103: Failed to apply! Possible dependencies:
    5e292e7646ef ("drm/nouveau: Remove unnecessary VCPI checks in
nv50_msto_cleanup()")
    5ff0cb1ce253 ("drm/nouveau/kms/nv50-: Use less encoders by making mstos
per-head")

v4.14.170: Failed to apply! Possible dependencies:
    07bbc1c5f49b ("drm/nouveau/core/memory: split info pointers from
accessor pointers")
    0b11b30de9d2 ("drm/nouveau/mmu/nv04-nv4x: move global vmm to
nvkm_mmu")
    11fc017dfb1e ("drm/nouveau/kms/nv50: prepare for double-buffered
LUTs")
    1590700d94ac ("drm/nouveau/kms/nv50-: split each resource type into
their own source files")
    269fe32d3343 ("drm/nouveau/bar: swap oneinit/init ordering, and rename
bar3 to bar2")
    30ed49b55b6e ("drm/nouveau/kms/nv50-: move code underneath
dispnv50/")
    34508f9d260c ("drm/nouveau/kms/nv50-: determine MST support from DP
Info Table")
    5b17f3624efa ("drm/nouveau/mmu/nv04: implement vmm on top of new
base")
    5e075fdeb166 ("drm/nouveau/mmu: automatically handle
"un-bootstrapping" of vmm")
    6359c982243e ("drm/nouveau/mmu/gp10b: fork from gf100")
    698c1aa9f83b ("drm/nouveau/kms/nv50-: Don't create MSTMs for eDP
connectors")
    7f53d6dc9a72 ("drm/nouveau/core/memory: comptag allocation")
    806a73356537 ("drm/nouveau/mmu: implement base for new vm
management")
    90df522912ac ("drm/nouveau/kms/nv50: use INTERPOLATE_257_UNITY_RANGE
LUT on newer chipsets")
    997a89003c2d ("drm/nouveau/core/memory: add reference counting")
    b86a45877ead ("drm/nouveau/mmu/gp100: fork from gf100")
    c83c4097eba8 ("drm/nouveau/mmu: define user interfaces to mmu memory
allocation")
    cedc4d57df26 ("drm/nouveau/mmu/gm20b: fork from gf100")
    d1f6c8d2e9df ("drm/nouveau/mmu/gk20a: fork from gf100")
    e1e33c791a23 ("drm/nouveau/mmu/gm200: fork from gf100")
    e69dae85c90b ("drm/nouveau/bar/nv50,g84: drop mmu invalidate")
    e75182f68b7b ("drm/nouveau/kms/nv50: use "low res" lut for
indexed mode")
    eaf1a69110f4 ("drm/nouveau/mmu: add base for type-based memory
allocation")
    f4778f08a038 ("drm/nouveau/kms/nv50: fix handling of gamma since atomic
conversion")
    f5650478ab07 ("drm/nouveau/disp/nv50-: pass nvkm_memory objects for
channel push buffers")

v4.9.213: Failed to apply! Possible dependencies:
    11fc017dfb1e ("drm/nouveau/kms/nv50: prepare for double-buffered
LUTs")
    34508f9d260c ("drm/nouveau/kms/nv50-: determine MST support from DP
Info Table")
    3dbd036b8419 ("drm/nouveau/kms/nv50: separate out mode commit")
    52aa30f2524d ("drm/nouveau/kms/nv50: switch mst sink back into sst
mode")
    698c1aa9f83b ("drm/nouveau/kms/nv50-: Don't create MSTMs for eDP
connectors")
    6bbab3b6b656 ("drm/nouveau/kms/nv50: separate out base/ovly channel
usage bounds commit")
    a7ae1561909d ("drm/nouveau/kms/nv50: separate out lut commit")
    ad6336195393 ("drm/nouveau/kms/nv50: separate out core surface
commit")
    f4778f08a038 ("drm/nouveau/kms/nv50: fix handling of gamma since atomic
conversion")

v4.4.213: Failed to apply! Possible dependencies:
    13a3d91f17a5 ("drm: Pass 'name' to drm_encoder_init()")
    34508f9d260c ("drm/nouveau/kms/nv50-: determine MST support from DP
Info Table")
    52aa30f2524d ("drm/nouveau/kms/nv50: switch mst sink back into sst
mode")
    698c1aa9f83b ("drm/nouveau/kms/nv50-: Don't create MSTMs for eDP
connectors")
    a7ae1561909d ("drm/nouveau/kms/nv50: separate out lut commit")
    ad6336195393 ("drm/nouveau/kms/nv50: separate out core surface
commit")
    f4778f08a038 ("drm/nouveau/kms/nv50: fix handling of gamma since atomic
conversion")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?

-- 
Thanks,
Sasha