Nouveau - Apr 2016 - [PATCH mesa v2 3/3] nouveau: codegen: LOAD: Take src swizzle into account

Hi,

On 22-04-16 09:08, Marek Olšák wrote:
> On Thu, Apr 21, 2016 at 7:04 PM, Ilia Mirkin <imirkin at
alum.mit.edu> wrote:
>> [+radeon folk]
>>
>> Marek, Nicolai, Bas - please have a look at the doc change and let us
>> know if you think this will cause a problem for radeon.
>>
>> Hans is solving the issue that he wants to swizzle the data loaded
>> from the image/buffer/whatever before sticking it into the dst
>> register.
>
> Is this something st/mesa needs or just nouveau? If just nouveau needs
> it, I don't see a point in updating the TGSI spec, since nouveau can
> just add the swizzle when translating from TGSI.
This is something which the llvm tgsi backend needs, which we plan to
use to add opencl support to nouveau.

 From the commit msg:

"The llvm TGSI backend uses pointers in registers and does things like:

LOAD TEMP[0].y, MEMORY[0], TEMP[0]

Expecting the data at address TEMP[0].x to get loaded to
TEMP[0].y. But this will cause the data at TEMP[0].x + 4 to be
loaded instead.

This commit adds support for a swizzle suffix for the 1st source
operand, which allows using:

LOAD TEMP[0].y, MEMORY[0].xxxx, TEMP[0]

And actually getting the desired behavior"

Regards,

Hans

On Fri, Apr 22, 2016 at 9:23 AM, Hans de Goede <hdegoede at redhat.com>
wrote:
> Hi,
>
> On 22-04-16 09:08, Marek Olšák wrote:
>>
>> On Thu, Apr 21, 2016 at 7:04 PM, Ilia Mirkin <imirkin at
alum.mit.edu> wrote:
>>>
>>> [+radeon folk]
>>>
>>> Marek, Nicolai, Bas - please have a look at the doc change and let
us
>>> know if you think this will cause a problem for radeon.
>>>
>>> Hans is solving the issue that he wants to swizzle the data loaded
>>> from the image/buffer/whatever before sticking it into the dst
>>> register.
>>
>>
>> Is this something st/mesa needs or just nouveau? If just nouveau needs
>> it, I don't see a point in updating the TGSI spec, since nouveau
can
>> just add the swizzle when translating from TGSI.
>
>
> This is something which the llvm tgsi backend needs, which we plan to
> use to add opencl support to nouveau.
>
> From the commit msg:
>
> "The llvm TGSI backend uses pointers in registers and does things
like:
>
> LOAD TEMP[0].y, MEMORY[0], TEMP[0]
>
> Expecting the data at address TEMP[0].x to get loaded to
> TEMP[0].y. But this will cause the data at TEMP[0].x + 4 to be
> loaded instead.
>
> This commit adds support for a swizzle suffix for the 1st source
> operand, which allows using:
>
> LOAD TEMP[0].y, MEMORY[0].xxxx, TEMP[0]
>
> And actually getting the desired behavior"
If radeonsi needs no changes and st/mesa doesn't change behavior, it's
OK.

Marek

Hi,

On 22-04-16 10:37, Marek Olšák wrote:
> On Fri, Apr 22, 2016 at 9:23 AM, Hans de Goede <hdegoede at
redhat.com> wrote:
>> Hi,
>>
>> On 22-04-16 09:08, Marek Olšák wrote:
>>>
>>> On Thu, Apr 21, 2016 at 7:04 PM, Ilia Mirkin <imirkin at
alum.mit.edu> wrote:
>>>>
>>>> [+radeon folk]
>>>>
>>>> Marek, Nicolai, Bas - please have a look at the doc change and
let us
>>>> know if you think this will cause a problem for radeon.
>>>>
>>>> Hans is solving the issue that he wants to swizzle the data
loaded
>>>> from the image/buffer/whatever before sticking it into the dst
>>>> register.
>>>
>>>
>>> Is this something st/mesa needs or just nouveau? If just nouveau
needs
>>> it, I don't see a point in updating the TGSI spec, since
nouveau can
>>> just add the swizzle when translating from TGSI.
>>
>>
>> This is something which the llvm tgsi backend needs, which we plan to
>> use to add opencl support to nouveau.
>>
>>  From the commit msg:
>>
>> "The llvm TGSI backend uses pointers in registers and does things
like:
>>
>> LOAD TEMP[0].y, MEMORY[0], TEMP[0]
>>
>> Expecting the data at address TEMP[0].x to get loaded to
>> TEMP[0].y. But this will cause the data at TEMP[0].x + 4 to be
>> loaded instead.
>>
>> This commit adds support for a swizzle suffix for the 1st source
>> operand, which allows using:
>>
>> LOAD TEMP[0].y, MEMORY[0].xxxx, TEMP[0]
>>
>> And actually getting the desired behavior"
>
> If radeonsi needs no changes and st/mesa doesn't change behavior,
it's OK.
Since radeonsi does not use llvm generated tgsi, it should not need any
changes, and these patches do not touch st/mesa.

Regards,

Hans