Nouveau - Oct 2015 - [PATCH v2 1/2] drm/nouveau: activate dual link TMDS links only when possible

These patches are adding support for outputting 2560x1440 at 56 over HDMI.
This needs a pixel clock of 225 MHz which was not supported before.

This was tested in a dual monitor setup with a GF114 (GTX 560 TI) and
one HDMI monitor running with 2560x1440 at 56 and one DVI monitor running
with 1920x1200 at 60. This still needs testing on other graphics cards and
with dual link DVI.

There is no Maintainers entry for nouveau.

This is based on top of Linux 4.3-rc4. I am not used to the process
uses by nouveau developers and I hope this is the correct way to get
this patch into upstream Linux.

changes since v1:
 * rebase on 4.3-rc4
 * update commit message
 
Hauke Mehrtens (2):
  drm/nouveau: activate dual link TMDS links only when possible
  drm/nouveau: increase max pixel clock to 225 MHZ for HDMI

 drivers/gpu/drm/nouveau/nouveau_connector.c      | 6 ++++--
 drivers/gpu/drm/nouveau/nv50_display.c           | 8 ++++----
 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c | 2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c  | 2 +-
 4 files changed, 10 insertions(+), 8 deletions(-)

-- 
2.1.4

Without this patch a pixel clock rate above 165 MHz on a TMDS link is
assumed to be dual link. This is true for DVI, but not for HDMI. HDMI
supports no dual link, but it supports pixel clock rates above 165 MHz.
Only activate Dual Link mode when it is actual possible.

Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 drivers/gpu/drm/nouveau/nv50_display.c           | 8 ++++----
 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c | 2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c  | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nv50_display.c
b/drivers/gpu/drm/nouveau/nv50_display.c
index 4ae87ae..12df358 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -1962,10 +1962,10 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct
drm_display_mode *umode,
 	switch (nv_encoder->dcb->type) {
 	case DCB_OUTPUT_TMDS:
 		if (nv_encoder->dcb->sorconf.link & 1) {
-			if (mode->clock < 165000)
-				proto = 0x1;
-			else
-				proto = 0x5;
+			proto = 0x1;
+			if (mode->clock >= 165000 &&
+			    nv_encoder->dcb->duallink_possible)
+				proto |= 0x4;
 		} else {
 			proto = 0x2;
 		}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
index 186fd3a..8691b68 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
@@ -158,7 +158,7 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32
pclk, u32 *conf)
 	switch (outp->info.type) {
 	case DCB_OUTPUT_TMDS:
 		*conf = (ctrl & 0x00000f00) >> 8;
-		if (pclk >= 165000)
+		if (pclk >= 165000 && outp->info.duallink_possible)
 			*conf |= 0x0100;
 		break;
 	case DCB_OUTPUT_LVDS:
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
index 32e73a9..ceecd0e 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
@@ -391,7 +391,7 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32
pclk, u32 *conf)
 		switch (outp->info.type) {
 		case DCB_OUTPUT_TMDS:
 			*conf = (ctrl & 0x00000f00) >> 8;
-			if (pclk >= 165000)
+			if (pclk >= 165000 && outp->info.duallink_possible)
 				*conf |= 0x0100;
 			break;
 		case DCB_OUTPUT_LVDS:
-- 
2.1.4

The Nvidia blob allows a pixel clock up to 225 MHz in version 346.59,
but only allowed 165MHz in version 295 for HDMI connections. This was
tested with a GF114 (Nvidia GTX 560 TI) and a HDMI monitor which used
225 MHz pixel clock and a signal link DVI monitor with a pixel clock of
less than 165 MHz. This should also be tested with some other device,
but I only have this one graphics card.

The HDMI standard <= 1.2 allowed a maximal pixel clock of 165 MHz and
the HDMI standard >= 1.3 allows a maximal pixel clock of 340 MHz. One
DVI link only allows a maximum clock of 165 MHz, so this should only be
changed for HDMI.

My assumption is that all Nvidia cards with HDMI support a Pixel clock
of 225 MHz, but I haven't tested this.

Without this patch the maximal screen resolution which was also
automatically chosen by nouveau is 2048x1152 at 60, but no BIOS messages
are shown on this monitor at all, it only gets activated when nouveau
is active. Without forcing, X still uses 2048x1152 at 60 by default, but
I can force it to something better with this patch.

Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 drivers/gpu/drm/nouveau/nouveau_connector.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c
b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 2e7cbe9..af813e7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -815,8 +815,10 @@ get_tmds_link_bandwidth(struct drm_connector *connector)
 	struct nouveau_drm *drm = nouveau_drm(connector->dev);
 	struct dcb_output *dcb = nv_connector->detected_encoder->dcb;
 
-	if (dcb->location != DCB_LOC_ON_CHIP ||
-	    drm->device.info.chipset >= 0x46)
+	if (drm_detect_hdmi_monitor(nv_connector->edid))
+		return 225000;
+	else if (dcb->location != DCB_LOC_ON_CHIP ||
+		 drm->device.info.chipset >= 0x46)
 		return 165000;
 	else if (drm->device.info.chipset >= 0x40)
 		return 155000;
-- 
2.1.4