Hi, As I'm looking to add some support to nouveau for features like atomic counters and images, I'm running into some confusion about what the first word of the shader header means. Here is the definition as we have it today: https://github.com/envytools/envytools/blob/master/rnndb/graph/gf100_shaders.xml VS/HS/DS/GS: <reg32 offset="0" name="0"> <bitfield high="7" low="0" name="MAGIC"> <value value="0x61" name="VP_MAGIC"/> </bitfield> <bitfield high="12" low="10" name="KIND" type="GF100_SHADER_KIND"/> <bitfield pos="16" name="GMEM_ENABLE"/> <bitfield pos="17" name="UNK17"/><!-- default 1 --> <bitfield pos="26" name="LMEM_ENABLE"/> <bitfield pos="27" name="FP64_ENABLE"/> </reg32> FS: <reg32 offset="0" name="0"> <bitfield high="7" low="0" name="MAGIC"> <value value="0x62" name="FP_MAGIC"/> </bitfield> <bitfield high="12" low="10" name="KIND" type="GF100_SHADER_KIND"/> <bitfield pos="14" name="MULTIPLE_COLOR_OUTPUTS" type="boolean"/> <bitfield pos="15" name="USES_KIL" type="boolean"/> <bitfield pos="16" name="GMEM_ENABLE"/> <bitfield pos="17" name="UNK17"/><!-- default 1 --> <bitfield pos="26" name="LMEM_ENABLE"/> <bitfield pos="27" name="FP64_ENABLE"/> </reg32> However I know that these are somewhat wrong. I've seen shaders that use gmem accesses (i.e. mov r0, [r0]) that just have the LMEM enable bit set (and they use no lmem). And I've seen additional bits set, esp relating to images, but I haven't spent enough time looking at all the variations to make sense of it yet. For example, I think that Fermi and Kepler+ have different meanings for some of the bits. I was hoping you could just release the docs for the shader headers, or at least the first word of the shader header. I know that it can take some time to get it all approved, but if you think this is *not* information you can release, please let me know soon so that I don't lose a month waiting. Thanks, -ilia
Hi Ilia, On Sat, May 02, 2015 at 12:34:21PM -0400, Ilia Mirkin wrote:> Hi, > > As I'm looking to add some support to nouveau for features like atomic > counters and images, I'm running into some confusion about what the > first word of the shader header means. Here is the definition as we > have it today:[...]> However I know that these are somewhat wrong. I've seen shaders that > use gmem accesses (i.e. mov r0, [r0]) that just have the LMEM enable > bit set (and they use no lmem). And I've seen additional bits set, esp > relating to images, but I haven't spent enough time looking at all the > variations to make sense of it yet. For example, I think that Fermi > and Kepler+ have different meanings for some of the bits.Those look pretty close :)> I was hoping you could just release the docs for the shader headers, > or at least the first word of the shader header.We've posted the specification for the full Shader Program Header to our GPU documentation site here: ftp://download.nvidia.com/open-gpu-doc/Shader-Program-Header/1/Shader-Program-Header.html I hope it helps clear things up. - Robert
On Thu, May 21, 2015 at 10:05 AM, Robert Morell <rmorell at nvidia.com> wrote:> Hi Ilia, > > On Sat, May 02, 2015 at 12:34:21PM -0400, Ilia Mirkin wrote: >> Hi, >> >> As I'm looking to add some support to nouveau for features like atomic >> counters and images, I'm running into some confusion about what the >> first word of the shader header means. Here is the definition as we >> have it today: > > [...] > >> However I know that these are somewhat wrong. I've seen shaders that >> use gmem accesses (i.e. mov r0, [r0]) that just have the LMEM enable >> bit set (and they use no lmem). And I've seen additional bits set, esp >> relating to images, but I haven't spent enough time looking at all the >> variations to make sense of it yet. For example, I think that Fermi >> and Kepler+ have different meanings for some of the bits. > > Those look pretty close :) > >> I was hoping you could just release the docs for the shader headers, >> or at least the first word of the shader header. > > We've posted the specification for the full Shader Program Header to our > GPU documentation site here: > > ftp://download.nvidia.com/open-gpu-doc/Shader-Program-Header/1/Shader-Program-Header.html > > I hope it helps clear things up.Yep, just a few follow-up questions: - SPH Type 1 and type 2 appear to be flipped wrt the tables -- "When PS is used, field SphType in CommonWord0 must be set to 1; similarly, when VTG is used, SphType in CommonWord0 must be set to 2." But the "Table 1. SPH Type 1 Definition" is clearly meant for VTG and table 2 is clearly meant for PS... - You skip over SassVersion -- what is that? - You have a funny note in there -- "Triangles generated by the geometry shader always have all their edge flags set to TRUE" -- that is the *only* reference to edge flags in the whole document. Right now we do some crazy thing to get edge flags right on fermi+ (and I think we just get them wrong on tesla). Is there a way to emit edge flags from vertex shader? - To be clear: DoesLoadOrStore -- *any* load/store? Even LDC? ALD? Thanks! -ilia