Emil Velikov
2011-Mar-19 23:31 UTC
[Nouveau] [PATCH 1/5] nouveau: Fix checkpatch.pl error messages
Fix the following message
'ERROR: trailing statements should be on next line'
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_display.c | 20 +++++++--
drivers/gpu/drm/nouveau/nouveau_mem.c | 12 ++++--
drivers/gpu/drm/nouveau/nouveau_object.c | 8 +++-
drivers/gpu/drm/nouveau/nv50_display.c | 64 +++++++++++++++++++++-------
drivers/gpu/drm/nouveau/nv50_fb.c | 9 +++-
drivers/gpu/drm/nouveau/nv50_grctx.c | 3 +-
drivers/gpu/drm/nouveau/nvc0_grctx.c | 4 +-
7 files changed, 88 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c
b/drivers/gpu/drm/nouveau/nouveau_display.c
index 764c15d..2dca746 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -91,12 +91,22 @@ nouveau_framebuffer_init(struct drm_device *dev,
nv_fb->r_dma = NvEvoVRAM_LP;
switch (fb->depth) {
- case 8: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; break;
- case 15: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; break;
- case 16: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; break;
+ case 8:
+ nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8;
+ break;
+ case 15:
+ nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15;
+ break;
+ case 16:
+ nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16;
+ break;
case 24:
- case 32: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; break;
- case 30: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; break;
+ case 32:
+ nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24;
+ break;
+ case 30:
+ nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30;
+ break;
default:
NV_ERROR(dev, "unknown depth %d\n", fb->depth);
return -EINVAL;
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c
b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 8af07c4..12f511e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -432,10 +432,14 @@ nouveau_mem_vram_init(struct drm_device *dev)
u32 rsvd;
/* estimate grctx size, the magics come from nv40_grctx.c */
- if (dev_priv->chipset == 0x40) rsvd = 0x6aa0 * vs;
- else if (dev_priv->chipset < 0x43) rsvd = 0x4f00 * vs;
- else if (nv44_graph_class(dev)) rsvd = 0x4980 * vs;
- else rsvd = 0x4a40 * vs;
+ if (dev_priv->chipset == 0x40)
+ rsvd = 0x6aa0 * vs;
+ else if (dev_priv->chipset < 0x43)
+ rsvd = 0x4f00 * vs;
+ else if (nv44_graph_class(dev))
+ rsvd = 0x4980 * vs;
+ else
+ rsvd = 0x4a40 * vs;
rsvd += 16 * 1024;
rsvd *= dev_priv->engine.fifo.channels;
diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c
b/drivers/gpu/drm/nouveau/nouveau_object.c
index 823800d..a89256e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_object.c
+++ b/drivers/gpu/drm/nouveau/nouveau_object.c
@@ -416,9 +416,13 @@ nv50_gpuobj_dma_init(struct nouveau_gpuobj *obj, u32
offset, int class,
flags0 |= 0x00100000;
switch (access) {
- case NV_MEM_ACCESS_RO: flags0 |= 0x00040000; break;
+ case NV_MEM_ACCESS_RO:
+ flags0 |= 0x00040000;
+ break;
case NV_MEM_ACCESS_RW:
- case NV_MEM_ACCESS_WO: flags0 |= 0x00080000; break;
+ case NV_MEM_ACCESS_WO:
+ flags0 |= 0x00080000;
+ break;
default:
break;
}
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c
b/drivers/gpu/drm/nouveau/nv50_display.c
index 75a376c..031116c 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -629,8 +629,12 @@ nv50_display_unk10_handler(struct drm_device *dev)
continue;
switch ((mc & 0x00000f00) >> 8) {
- case 0: type = OUTPUT_ANALOG; break;
- case 1: type = OUTPUT_TV; break;
+ case 0:
+ type = OUTPUT_ANALOG;
+ break;
+ case 1:
+ type = OUTPUT_TV;
+ break;
default:
NV_ERROR(dev, "invalid mc, DAC-%d: 0x%08x\n", i, mc);
goto ack;
@@ -652,12 +656,24 @@ nv50_display_unk10_handler(struct drm_device *dev)
continue;
switch ((mc & 0x00000f00) >> 8) {
- case 0: type = OUTPUT_LVDS; break;
- case 1: type = OUTPUT_TMDS; break;
- case 2: type = OUTPUT_TMDS; break;
- case 5: type = OUTPUT_TMDS; break;
- case 8: type = OUTPUT_DP; break;
- case 9: type = OUTPUT_DP; break;
+ case 0:
+ type = OUTPUT_LVDS;
+ break;
+ case 1:
+ type = OUTPUT_TMDS;
+ break;
+ case 2:
+ type = OUTPUT_TMDS;
+ break;
+ case 5:
+ type = OUTPUT_TMDS;
+ break;
+ case 8:
+ type = OUTPUT_DP;
+ break;
+ case 9:
+ type = OUTPUT_DP;
+ break;
default:
NV_ERROR(dev, "invalid mc, SOR-%d: 0x%08x\n", i, mc);
goto ack;
@@ -761,8 +777,12 @@ nv50_display_unk20_handler(struct drm_device *dev)
continue;
switch ((mc & 0x00000f00) >> 8) {
- case 0: type = OUTPUT_ANALOG; break;
- case 1: type = OUTPUT_TV; break;
+ case 0:
+ type = OUTPUT_ANALOG;
+ break;
+ case 1:
+ type = OUTPUT_TV;
+ break;
default:
NV_ERROR(dev, "invalid mc, DAC-%d: 0x%08x\n", i, mc);
goto ack;
@@ -784,12 +804,24 @@ nv50_display_unk20_handler(struct drm_device *dev)
continue;
switch ((mc & 0x00000f00) >> 8) {
- case 0: type = OUTPUT_LVDS; break;
- case 1: type = OUTPUT_TMDS; break;
- case 2: type = OUTPUT_TMDS; break;
- case 5: type = OUTPUT_TMDS; break;
- case 8: type = OUTPUT_DP; break;
- case 9: type = OUTPUT_DP; break;
+ case 0:
+ type = OUTPUT_LVDS;
+ break;
+ case 1:
+ type = OUTPUT_TMDS;
+ break;
+ case 2:
+ type = OUTPUT_TMDS;
+ break;
+ case 5:
+ type = OUTPUT_TMDS;
+ break;
+ case 8:
+ type = OUTPUT_DP;
+ break;
+ case 9:
+ type = OUTPUT_DP;
+ break;
default:
NV_ERROR(dev, "invalid mc, SOR-%d: 0x%08x\n", i, mc);
goto ack;
diff --git a/drivers/gpu/drm/nouveau/nv50_fb.c
b/drivers/gpu/drm/nouveau/nv50_fb.c
index ddebd71..d6880e4 100644
--- a/drivers/gpu/drm/nouveau/nv50_fb.c
+++ b/drivers/gpu/drm/nouveau/nv50_fb.c
@@ -277,9 +277,12 @@ nv50_fb_vm_trap(struct drm_device *dev, int display)
else
printk("%02x/", st2);
- if (cl && cl->data) cl = nouveau_enum_find(cl->data, st3);
- else if (en && en->data) cl = nouveau_enum_find(en->data, st3);
- else cl = NULL;
+ if (cl && cl->data)
+ cl = nouveau_enum_find(cl->data, st3);
+ else if (en && en->data)
+ cl = nouveau_enum_find(en->data, st3);
+ else
+ cl = NULL;
if (cl)
printk("%s", cl->name);
else
diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c
b/drivers/gpu/drm/nouveau/nv50_grctx.c
index 336aab2..6a4290a 100644
--- a/drivers/gpu/drm/nouveau/nv50_grctx.c
+++ b/drivers/gpu/drm/nouveau/nv50_grctx.c
@@ -572,7 +572,8 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx)
/* per-MP state */
for (j = 0; j < (dev_priv->chipset < 0xa0 ? 2 : 4); j++) {
- if (!(units & (1 << (j+24)))) continue;
+ if (!(units & (1 << (j+24))))
+ continue;
if (dev_priv->chipset < 0xa0)
offset = base + 0x200 + (j<<7);
else
diff --git a/drivers/gpu/drm/nouveau/nvc0_grctx.c
b/drivers/gpu/drm/nouveau/nvc0_grctx.c
index f880ff7..7aa0cbf 100644
--- a/drivers/gpu/drm/nouveau/nvc0_grctx.c
+++ b/drivers/gpu/drm/nouveau/nvc0_grctx.c
@@ -32,7 +32,9 @@ nv_icmd(struct drm_device *dev, u32 icmd, u32 data)
{
nv_wr32(dev, 0x400204, data);
nv_wr32(dev, 0x400200, icmd);
- while (nv_rd32(dev, 0x400700) & 2) {}
+ while (nv_rd32(dev, 0x400700) & 2) {
+ /* by design */
+ }
}
static void
--
1.7.1
Emil Velikov
2011-Mar-19 23:31 UTC
[Nouveau] [PATCH 2/5] nouveau: Fix checkpatch.pl error messages
Fix 'ERROR: code indent should use tabs where possible'
Fix 'ERROR: space required before the open parenthesis ('
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_drv.h | 6 +++---
drivers/gpu/drm/nouveau/nouveau_mem.c | 14 +++++++-------
drivers/gpu/drm/nouveau/nv50_grctx.c | 4 ++--
drivers/gpu/drm/nouveau/nvc0_graph.c | 18 +++++++++---------
4 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h
b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 0611188..0c18a06 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -884,13 +884,13 @@ extern void nouveau_channel_idle(struct nouveau_channel
*chan);
int ret = nouveau_gpuobj_class_new((d), (c), NVOBJ_ENGINE_##e); \
if (ret) \
return ret; \
-} while(0)
+} while (0)
#define NVOBJ_MTHD(d,c,m,e) do {
\
int ret = nouveau_gpuobj_mthd_new((d), (c), (m), (e)); \
if (ret) \
return ret; \
-} while(0)
+} while (0)
extern int nouveau_gpuobj_early_init(struct drm_device *);
extern int nouveau_gpuobj_init(struct drm_device *);
@@ -900,7 +900,7 @@ extern void nouveau_gpuobj_resume(struct drm_device *dev);
extern int nouveau_gpuobj_class_new(struct drm_device *, u32 class, u32 eng);
extern int nouveau_gpuobj_mthd_new(struct drm_device *, u32 class, u32 mthd,
int (*exec)(struct nouveau_channel *,
- u32 class, u32 mthd, u32 data));
+ u32 class, u32 mthd, u32 data));
extern int nouveau_gpuobj_mthd_call(struct nouveau_channel *, u32, u32, u32);
extern int nouveau_gpuobj_mthd_call2(struct drm_device *, int, u32, u32, u32);
extern int nouveau_gpuobj_channel_init(struct nouveau_channel *,
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c
b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 12f511e..fd4752b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -603,7 +603,7 @@ nouveau_mem_timing_init(struct drm_device *dev)
/* Get "some number" from the timing reg for NV_40
* Used in calculations later */
- if(dev_priv->card_type == NV_40) {
+ if (dev_priv->card_type == NV_40) {
magic_number = (nv_rd32(dev,0x100228) & 0x0f000000) >> 24;
}
@@ -649,22 +649,22 @@ nouveau_mem_timing_init(struct drm_device *dev)
timing->reg_100224 = (tUNK_0 + tUNK_19 + 1 + magic_number) << 24 |
tUNK_18 << 16 |
(tUNK_1 + tUNK_19 + 1 + magic_number) << 8;
- if(dev_priv->chipset == 0xa8) {
+ if (dev_priv->chipset == 0xa8) {
timing->reg_100224 |= (tUNK_2 - 1);
} else {
timing->reg_100224 |= (tUNK_2 + 2 - magic_number);
}
timing->reg_100228 = (tUNK_12 << 16 | tUNK_11 << 8 | tUNK_10);
- if(dev_priv->chipset >= 0xa3 && dev_priv->chipset < 0xaa)
{
+ if (dev_priv->chipset >= 0xa3 && dev_priv->chipset <
0xaa) {
timing->reg_100228 |= (tUNK_19 - 1) << 24;
}
- if(dev_priv->card_type == NV_40) {
+ if (dev_priv->card_type == NV_40) {
/* NV40: don't know what the rest of the regs are..
* And don't need to know either */
timing->reg_100228 |= 0x20200000 | magic_number << 24;
- } else if(dev_priv->card_type >= NV_50) {
+ } else if (dev_priv->card_type >= NV_50) {
/* XXX: reg_10022c */
timing->reg_10022c = tUNK_2 - 1;
@@ -674,7 +674,7 @@ nouveau_mem_timing_init(struct drm_device *dev)
timing->reg_100234 = (tRAS << 24 | tRC);
timing->reg_100234 += max(tUNK_10,tUNK_11) << 16;
- if(dev_priv->chipset < 0xa3) {
+ if (dev_priv->chipset < 0xa3) {
timing->reg_100234 |= (tUNK_2 + 2) << 8;
} else {
/* XXX: +6? */
@@ -685,7 +685,7 @@ nouveau_mem_timing_init(struct drm_device *dev)
* reg_100238: 0x00??????
* reg_10023c: 0x!!??0202 for NV50+ cards (empirical evidence) */
timing->reg_10023c = 0x202;
- if(dev_priv->chipset < 0xa3) {
+ if (dev_priv->chipset < 0xa3) {
timing->reg_10023c |= 0x4000000 | (tUNK_2 - 1) << 16;
} else {
/* currently unknown
diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c
b/drivers/gpu/drm/nouveau/nv50_grctx.c
index 6a4290a..9d1f6ba 100644
--- a/drivers/gpu/drm/nouveau/nv50_grctx.c
+++ b/drivers/gpu/drm/nouveau/nv50_grctx.c
@@ -748,7 +748,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx)
gr_def(ctx, offset + 0x64, 0x0000001f);
gr_def(ctx, offset + 0x68, 0x0000000f);
gr_def(ctx, offset + 0x6c, 0x0000000f);
- } else if(dev_priv->chipset < 0xa0) {
+ } else if (dev_priv->chipset < 0xa0) {
cp_ctx(ctx, offset + 0x50, 1);
cp_ctx(ctx, offset + 0x70, 1);
} else {
@@ -2837,7 +2837,7 @@ nv50_graph_construct_xfer_tprop(struct nouveau_grctx *ctx)
xf_emit(ctx, 1, 1); /* 00000001 DST_LINEAR */
if (IS_NVA3F(dev_priv->chipset))
xf_emit(ctx, 1, 1); /* 0000001f tesla UNK169C */
- if(dev_priv->chipset == 0x50)
+ if (dev_priv->chipset == 0x50)
xf_emit(ctx, 1, 0); /* ff */
else
xf_emit(ctx, 3, 0); /* 1, 7, 3ff */
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c
b/drivers/gpu/drm/nouveau/nvc0_graph.c
index 3de9b72..c19ff30 100644
--- a/drivers/gpu/drm/nouveau/nvc0_graph.c
+++ b/drivers/gpu/drm/nouveau/nvc0_graph.c
@@ -200,15 +200,15 @@ nvc0_graph_create_context(struct nouveau_channel *chan)
for (i = 0; i < priv->grctx_size; i += 4)
nv_wo32(grctx, i, priv->grctx_vals[i / 4]);
- nv_wo32(grctx, 0xf4, 0);
- nv_wo32(grctx, 0xf8, 0);
- nv_wo32(grctx, 0x10, grch->mmio_nr);
- nv_wo32(grctx, 0x14, lower_32_bits(grch->mmio->vinst));
- nv_wo32(grctx, 0x18, upper_32_bits(grch->mmio->vinst));
- nv_wo32(grctx, 0x1c, 1);
- nv_wo32(grctx, 0x20, 0);
- nv_wo32(grctx, 0x28, 0);
- nv_wo32(grctx, 0x2c, 0);
+ nv_wo32(grctx, 0xf4, 0);
+ nv_wo32(grctx, 0xf8, 0);
+ nv_wo32(grctx, 0x10, grch->mmio_nr);
+ nv_wo32(grctx, 0x14, lower_32_bits(grch->mmio->vinst));
+ nv_wo32(grctx, 0x18, upper_32_bits(grch->mmio->vinst));
+ nv_wo32(grctx, 0x1c, 1);
+ nv_wo32(grctx, 0x20, 0);
+ nv_wo32(grctx, 0x28, 0);
+ nv_wo32(grctx, 0x2c, 0);
pinstmem->flush(dev);
return 0;
--
1.7.1
Emil Velikov
2011-Mar-19 23:31 UTC
[Nouveau] [PATCH 3/5] nouveau: Fix checkpatch.pl messages
Fix 'ERROR: trailing whitespace',
Fix 'ERROR: do not use C99 // comments'
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_state.c | 2 +-
drivers/gpu/drm/nouveau/nv04_graph.c | 2 +-
drivers/gpu/drm/nouveau/nv50_grctx.c | 2 +-
drivers/gpu/drm/nouveau/nvc0_graph.c | 50 ++++++++++++++++---------------
drivers/gpu/drm/nouveau/nvc0_graph.h | 6 ++--
drivers/gpu/drm/nouveau/nvc0_grctx.c | 16 +++++-----
6 files changed, 40 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c
b/drivers/gpu/drm/nouveau/nouveau_state.c
index 9582165..e162514 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -870,7 +870,7 @@ static int nouveau_remove_conflicting_drivers(struct
drm_device *dev)
#ifdef CONFIG_X86
primary = dev->pdev->resource[PCI_ROM_RESOURCE].flags &
IORESOURCE_ROM_SHADOW;
#endif
-
+
remove_conflicting_framebuffers(dev_priv->apertures, "nouveaufb",
primary);
return 0;
}
diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c
b/drivers/gpu/drm/nouveau/nv04_graph.c
index af75015..c624ae9 100644
--- a/drivers/gpu/drm/nouveau/nv04_graph.c
+++ b/drivers/gpu/drm/nouveau/nv04_graph.c
@@ -507,7 +507,7 @@ int nv04_graph_init(struct drm_device *dev)
nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0x001FFFFF);*/
nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0x1231c000);
/*1231C000 blob, 001 haiku*/
- //*V_WRITE(NV04_PGRAPH_DEBUG_1, 0xf2d91100);*/
+ /*V_WRITE(NV04_PGRAPH_DEBUG_1, 0xf2d91100);*/
nv_wr32(dev, NV04_PGRAPH_DEBUG_1, 0x72111100);
/*0x72111100 blob , 01 haiku*/
/*nv_wr32(dev, NV04_PGRAPH_DEBUG_2, 0x11d5f870);*/
diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c
b/drivers/gpu/drm/nouveau/nv50_grctx.c
index 9d1f6ba..871a6d8 100644
--- a/drivers/gpu/drm/nouveau/nv50_grctx.c
+++ b/drivers/gpu/drm/nouveau/nv50_grctx.c
@@ -925,7 +925,7 @@ nv50_graph_construct_mmio_ddata(struct nouveau_grctx *ctx)
dd_emit(ctx, 1, 0); /* 0000007f MULTISAMPLE_SAMPLES_LOG2 */
} else {
dd_emit(ctx, 1, 0); /* 0000000f MULTISAMPLE_SAMPLES_LOG2 */
- }
+ }
dd_emit(ctx, 1, 0xc); /* 000000ff SEMANTIC_COLOR.BFC0_ID */
if (dev_priv->chipset != 0x50)
dd_emit(ctx, 1, 0); /* 00000001 SEMANTIC_COLOR.CLMP_EN */
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c
b/drivers/gpu/drm/nouveau/nvc0_graph.c
index c19ff30..68f5c3f 100644
--- a/drivers/gpu/drm/nouveau/nvc0_graph.c
+++ b/drivers/gpu/drm/nouveau/nvc0_graph.c
@@ -452,28 +452,30 @@ nvc0_graph_init_gpc_0(struct drm_device *dev)
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nvc0_graph_priv *priv = dev_priv->engine.graph.priv;
int gpc;
-
- // TP ROP UNKVAL(magic_not_rop_nr)
- // 450: 4/0/0/0 2 3
- // 460: 3/4/0/0 4 1
- // 465: 3/4/4/0 4 7
- // 470: 3/3/4/4 5 5
- // 480: 3/4/4/4 6 6
-
- // magicgpc918
- // 450: 00200000 00000000001000000000000000000000
- // 460: 00124925 00000000000100100100100100100101
- // 465: 000ba2e9 00000000000010111010001011101001
- // 470: 00092493 00000000000010010010010010010011
- // 480: 00088889 00000000000010001000100010001001
-
- /* filled values up to tp_total, remainder 0 */
- // 450: 00003210 00000000 00000000 00000000
- // 460: 02321100 00000000 00000000 00000000
- // 465: 22111000 00000233 00000000 00000000
- // 470: 11110000 00233222 00000000 00000000
- // 480: 11110000 03332222 00000000 00000000
-
+
+ /*
+ * TP ROP UNKVAL(magic_not_rop_nr)
+ * 450: 4/0/0/0 2 3
+ * 460: 3/4/0/0 4 1
+ * 465: 3/4/4/0 4 7
+ * 470: 3/3/4/4 5 5
+ * 480: 3/4/4/4 6 6
+
+ * magicgpc918
+ * 450: 00200000 00000000001000000000000000000000
+ * 460: 00124925 00000000000100100100100100100101
+ * 465: 000ba2e9 00000000000010111010001011101001
+ * 470: 00092493 00000000000010010010010010010011
+ * 480: 00088889 00000000000010001000100010001001
+
+ * filled values up to tp_total, remainder 0
+ * 450: 00003210 00000000 00000000 00000000
+ * 460: 02321100 00000000 00000000 00000000
+ * 465: 22111000 00000233 00000000 00000000
+ * 470: 11110000 00233222 00000000 00000000
+ * 480: 11110000 03332222 00000000 00000000
+ */
+
nv_wr32(dev, GPC_BCAST(0x0980), priv->magicgpc980[0]);
nv_wr32(dev, GPC_BCAST(0x0984), priv->magicgpc980[1]);
nv_wr32(dev, GPC_BCAST(0x0988), priv->magicgpc980[2]);
@@ -676,9 +678,9 @@ nvc0_graph_init(struct drm_device *dev)
nvc0_graph_init_obj418880(dev);
nvc0_graph_init_regs(dev);
- //nvc0_graph_init_unitplemented_magics(dev);
+ /*nvc0_graph_init_unitplemented_magics(dev);*/
nvc0_graph_init_gpc_0(dev);
- //nvc0_graph_init_unitplemented_c242(dev);
+ /*nvc0_graph_init_unitplemented_c242(dev);*/
nv_wr32(dev, 0x400500, 0x00010001);
nv_wr32(dev, 0x400100, 0xffffffff);
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.h
b/drivers/gpu/drm/nouveau/nvc0_graph.h
index 40e26f9..93c8777 100644
--- a/drivers/gpu/drm/nouveau/nvc0_graph.h
+++ b/drivers/gpu/drm/nouveau/nvc0_graph.h
@@ -52,9 +52,9 @@ struct nvc0_graph_priv {
struct nvc0_graph_chan {
struct nouveau_gpuobj *grctx;
- struct nouveau_gpuobj *unk408004; // 0x418810 too
- struct nouveau_gpuobj *unk40800c; // 0x419004 too
- struct nouveau_gpuobj *unk418810; // 0x419848 too
+ struct nouveau_gpuobj *unk408004; /* 0x418810 too */
+ struct nouveau_gpuobj *unk40800c; /* 0x419004 too */
+ struct nouveau_gpuobj *unk418810; /* 0x419848 too */
struct nouveau_gpuobj *mmio;
int mmio_nr;
};
diff --git a/drivers/gpu/drm/nouveau/nvc0_grctx.c
b/drivers/gpu/drm/nouveau/nvc0_grctx.c
index 7aa0cbf..da267da 100644
--- a/drivers/gpu/drm/nouveau/nvc0_grctx.c
+++ b/drivers/gpu/drm/nouveau/nvc0_grctx.c
@@ -1625,7 +1625,7 @@ nvc0_grctx_generate_rop(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
- // ROPC_BROADCAST
+ /* ROPC_BROADCAST */
nv_wr32(dev, 0x408800, 0x02802a3c);
nv_wr32(dev, 0x408804, 0x00000040);
nv_wr32(dev, 0x408808, 0x0003e00d);
@@ -1649,7 +1649,7 @@ nvc0_grctx_generate_gpc(struct drm_device *dev)
{
int i;
- // GPC_BROADCAST
+ /* GPC_BROADCAST */
nv_wr32(dev, 0x418380, 0x00000016);
nv_wr32(dev, 0x418400, 0x38004e00);
nv_wr32(dev, 0x418404, 0x71e0ffff);
@@ -1730,7 +1730,7 @@ nvc0_grctx_generate_tp(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
- // GPC_BROADCAST.TP_BROADCAST
+ /* GPC_BROADCAST.TP_BROADCAST */
nv_wr32(dev, 0x419848, 0x00000000);
nv_wr32(dev, 0x419864, 0x0000012a);
nv_wr32(dev, 0x419888, 0x00000000);
@@ -1743,7 +1743,7 @@ nvc0_grctx_generate_tp(struct drm_device *dev)
nv_wr32(dev, 0x419a1c, 0x00000000);
nv_wr32(dev, 0x419a20, 0x00000800);
if (dev_priv->chipset != 0xc0)
- nv_wr32(dev, 0x00419ac4, 0x0007f440); // 0xc3
+ nv_wr32(dev, 0x00419ac4, 0x0007f440); /* 0xc3 */
nv_wr32(dev, 0x419b00, 0x0a418820);
nv_wr32(dev, 0x419b04, 0x062080e6);
nv_wr32(dev, 0x419b08, 0x020398a4);
@@ -1914,13 +1914,13 @@ nvc0_grctx_generate(struct nouveau_channel *chan)
for (i = 1; i < 7; i++)
data2[1] |= ((1 << (i + 5)) % ntpcv) << ((i - 1) * 5);
- // GPC_BROADCAST
+ /* GPC_BROADCAST */
nv_wr32(dev, 0x418bb8, (priv->tp_total << 8) |
priv->magic_not_rop_nr);
for (i = 0; i < 6; i++)
nv_wr32(dev, 0x418b08 + (i * 4), data[i]);
- // GPC_BROADCAST.TP_BROADCAST
+ /* GPC_BROADCAST.TP_BROADCAST */
nv_wr32(dev, 0x419bd0, (priv->tp_total << 8) |
priv->magic_not_rop_nr |
data2[0]);
@@ -1928,7 +1928,7 @@ nvc0_grctx_generate(struct nouveau_channel *chan)
for (i = 0; i < 6; i++)
nv_wr32(dev, 0x419b00 + (i * 4), data[i]);
- // UNK78xx
+ /* UNK78xx */
nv_wr32(dev, 0x4078bc, (priv->tp_total << 8) |
priv->magic_not_rop_nr);
for (i = 0; i < 6; i++)
@@ -1946,7 +1946,7 @@ nvc0_grctx_generate(struct nouveau_channel *chan)
gpc = -1;
for (i = 0, gpc = -1; i < 32; i++) {
int ltp = i * (priv->tp_total - 1) / 32;
-
+
do {
gpc = (gpc + 1) % priv->gpc_nr;
} while (!tpnr[gpc]);
--
1.7.1
Emil Velikov
2011-Mar-19 23:31 UTC
[Nouveau] [PATCH 4/5] nouveau: Fix checkpatch.pl error messages
Fix 'ERROR: that open brace { should be on the previous line'
Fix 'ERROR: else should follow close brace }'
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
---
drivers/gpu/drm/nouveau/nv04_crtc.c | 3 +--
drivers/gpu/drm/nouveau/nv04_graph.c | 6 ++----
drivers/gpu/drm/nouveau/nv10_graph.c | 3 +--
drivers/gpu/drm/nouveau/nv50_crtc.c | 3 +--
drivers/gpu/drm/nouveau/nv50_graph.c | 3 +--
drivers/gpu/drm/nouveau/nv50_grctx.c | 4 +---
6 files changed, 7 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c
b/drivers/gpu/drm/nouveau/nv04_crtc.c
index a260fbb..5ffc5ba 100644
--- a/drivers/gpu/drm/nouveau/nv04_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv04_crtc.c
@@ -790,8 +790,7 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc,
if (atomic) {
drm_fb = passed_fb;
fb = nouveau_framebuffer(passed_fb);
- }
- else {
+ } else {
/* If not atomic, we can go ahead and pin, and unpin the
* old fb we were passed.
*/
diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c
b/drivers/gpu/drm/nouveau/nv04_graph.c
index c624ae9..055677a 100644
--- a/drivers/gpu/drm/nouveau/nv04_graph.c
+++ b/drivers/gpu/drm/nouveau/nv04_graph.c
@@ -1232,8 +1232,7 @@ static struct nouveau_bitfield nv04_graph_intr[] = {
{}
};
-static struct nouveau_bitfield nv04_graph_nstatus[] -{
+static struct nouveau_bitfield nv04_graph_nstatus[] = {
{ NV04_PGRAPH_NSTATUS_STATE_IN_USE, "STATE_IN_USE" },
{ NV04_PGRAPH_NSTATUS_INVALID_STATE, "INVALID_STATE" },
{ NV04_PGRAPH_NSTATUS_BAD_ARGUMENT, "BAD_ARGUMENT" },
@@ -1241,8 +1240,7 @@ static struct nouveau_bitfield nv04_graph_nstatus[] {}
};
-struct nouveau_bitfield nv04_graph_nsource[] -{
+struct nouveau_bitfield nv04_graph_nsource[] = {
{ NV03_PGRAPH_NSOURCE_NOTIFICATION, "NOTIFICATION" },
{ NV03_PGRAPH_NSOURCE_DATA_ERROR, "DATA_ERROR" },
{ NV03_PGRAPH_NSOURCE_PROTECTION_ERROR, "PROTECTION_ERROR" },
diff --git a/drivers/gpu/drm/nouveau/nv10_graph.c
b/drivers/gpu/drm/nouveau/nv10_graph.c
index 8c92edb..531d7ba 100644
--- a/drivers/gpu/drm/nouveau/nv10_graph.c
+++ b/drivers/gpu/drm/nouveau/nv10_graph.c
@@ -1117,8 +1117,7 @@ struct nouveau_bitfield nv10_graph_intr[] = {
{}
};
-struct nouveau_bitfield nv10_graph_nstatus[] -{
+struct nouveau_bitfield nv10_graph_nstatus[] = {
{ NV10_PGRAPH_NSTATUS_STATE_IN_USE, "STATE_IN_USE" },
{ NV10_PGRAPH_NSTATUS_INVALID_STATE, "INVALID_STATE" },
{ NV10_PGRAPH_NSTATUS_BAD_ARGUMENT, "BAD_ARGUMENT" },
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c
b/drivers/gpu/drm/nouveau/nv50_crtc.c
index 2b99840..24607c7 100644
--- a/drivers/gpu/drm/nouveau/nv50_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv50_crtc.c
@@ -535,8 +535,7 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc,
if (atomic) {
drm_fb = passed_fb;
fb = nouveau_framebuffer(passed_fb);
- }
- else {
+ } else {
/* If not atomic, we can go ahead and pin, and unpin the
* old fb we were passed.
*/
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c
b/drivers/gpu/drm/nouveau/nv50_graph.c
index 8675b00..614177c 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -548,8 +548,7 @@ nv86_graph_tlb_flush(struct drm_device *dev)
spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
}
-static struct nouveau_enum nv50_mp_exec_error_names[] -{
+static struct nouveau_enum nv50_mp_exec_error_names[] = {
{ 3, "STACK_UNDERFLOW", NULL },
{ 4, "QUADON_ACTIVE", NULL },
{ 8, "TIMEOUT", NULL },
diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c
b/drivers/gpu/drm/nouveau/nv50_grctx.c
index 871a6d8..da10934 100644
--- a/drivers/gpu/drm/nouveau/nv50_grctx.c
+++ b/drivers/gpu/drm/nouveau/nv50_grctx.c
@@ -1804,9 +1804,7 @@ nv50_graph_construct_gene_unk24xx(struct nouveau_grctx
*ctx)
xf_emit(ctx, 1, 0); /* 1ff */
xf_emit(ctx, 8, 0); /* 0? */
xf_emit(ctx, 9, 0); /* ffffffff, 7ff */
- }
- else
- {
+ } else {
xf_emit(ctx, 0xc, 0); /* RO */
/* SEEK */
xf_emit(ctx, 0xe10, 0); /* 190 * 9: 8*ffffffff, 7ff */
--
1.7.1
Emil Velikov
2011-Mar-19 23:31 UTC
[Nouveau] [PATCH 5/5] nouveau: Silence checkpatch.pl error messages
This patch fixes messages such as
ERROR: space required after that ','
ERROR: spaces required around that '='
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
---
drivers/gpu/drm/nouveau/nouveau_drv.h | 4 ++--
drivers/gpu/drm/nouveau/nouveau_grctx.h | 10 +++++-----
drivers/gpu/drm/nouveau/nouveau_mem.c | 4 ++--
drivers/gpu/drm/nouveau/nouveau_reg.h | 14 +++++++-------
drivers/gpu/drm/nouveau/nv50_graph.c | 2 +-
drivers/gpu/drm/nouveau/nvc0_graph.h | 10 +++++-----
6 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h
b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 0c18a06..383093e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -880,13 +880,13 @@ extern void nouveau_channel_ref(struct nouveau_channel
*chan,
extern void nouveau_channel_idle(struct nouveau_channel *chan);
/* nouveau_object.c */
-#define NVOBJ_CLASS(d,c,e) do {
\
+#define NVOBJ_CLASS(d, c, e) do {
\
int ret = nouveau_gpuobj_class_new((d), (c), NVOBJ_ENGINE_##e); \
if (ret) \
return ret; \
} while (0)
-#define NVOBJ_MTHD(d,c,m,e) do {
\
+#define NVOBJ_MTHD(d, c, m, e) do {
\
int ret = nouveau_gpuobj_mthd_new((d), (c), (m), (e)); \
if (ret) \
return ret; \
diff --git a/drivers/gpu/drm/nouveau/nouveau_grctx.h
b/drivers/gpu/drm/nouveau/nouveau_grctx.h
index 4a8ad13..86c2e37 100644
--- a/drivers/gpu/drm/nouveau/nouveau_grctx.h
+++ b/drivers/gpu/drm/nouveau/nouveau_grctx.h
@@ -87,10 +87,10 @@ _cp_bra(struct nouveau_grctx *ctx, u32 mod, int flag, int
state, int name)
cp_out(ctx, CP_BRA | (mod << 18) | ip | flag |
(state ? 0 : CP_BRA_IF_CLEAR));
}
-#define cp_bra(c,f,s,n) _cp_bra((c), 0, CP_FLAG_##f, CP_FLAG_##f##_##s, n)
+#define cp_bra(c, f, s, n) _cp_bra((c), 0, CP_FLAG_##f, CP_FLAG_##f##_##s, n)
#ifdef CP_BRA_MOD
-#define cp_cal(c,f,s,n) _cp_bra((c), 1, CP_FLAG_##f, CP_FLAG_##f##_##s, n)
-#define cp_ret(c,f,s) _cp_bra((c), 2, CP_FLAG_##f, CP_FLAG_##f##_##s, 0)
+#define cp_cal(c, f, s, n) _cp_bra((c), 1, CP_FLAG_##f, CP_FLAG_##f##_##s, n)
+#define cp_ret(c, f, s) _cp_bra((c), 2, CP_FLAG_##f, CP_FLAG_##f##_##s, 0)
#endif
static inline void
@@ -98,14 +98,14 @@ _cp_wait(struct nouveau_grctx *ctx, int flag, int state)
{
cp_out(ctx, CP_WAIT | flag | (state ? CP_WAIT_SET : 0));
}
-#define cp_wait(c,f,s) _cp_wait((c), CP_FLAG_##f, CP_FLAG_##f##_##s)
+#define cp_wait(c, f, s) _cp_wait((c), CP_FLAG_##f, CP_FLAG_##f##_##s)
static inline void
_cp_set(struct nouveau_grctx *ctx, int flag, int state)
{
cp_out(ctx, CP_SET | flag | (state ? CP_SET_1 : 0));
}
-#define cp_set(c,f,s) _cp_set((c), CP_FLAG_##f, CP_FLAG_##f##_##s)
+#define cp_set(c, f, s) _cp_set((c), CP_FLAG_##f, CP_FLAG_##f##_##s)
static inline void
cp_pos(struct nouveau_grctx *ctx, int offset)
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c
b/drivers/gpu/drm/nouveau/nouveau_mem.c
index fd4752b..2154e40 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -604,7 +604,7 @@ nouveau_mem_timing_init(struct drm_device *dev)
/* Get "some number" from the timing reg for NV_40
* Used in calculations later */
if (dev_priv->card_type == NV_40) {
- magic_number = (nv_rd32(dev,0x100228) & 0x0f000000) >> 24;
+ magic_number = (nv_rd32(dev, 0x100228) & 0x0f000000) >> 24;
}
entry = mem + mem[1];
@@ -672,7 +672,7 @@ nouveau_mem_timing_init(struct drm_device *dev)
tUNK_13 << 8 | tUNK_13);
timing->reg_100234 = (tRAS << 24 | tRC);
- timing->reg_100234 += max(tUNK_10,tUNK_11) << 16;
+ timing->reg_100234 += max(tUNK_10, tUNK_11) << 16;
if (dev_priv->chipset < 0xa3) {
timing->reg_100234 |= (tUNK_2 + 2) << 8;
diff --git a/drivers/gpu/drm/nouveau/nouveau_reg.h
b/drivers/gpu/drm/nouveau/nouveau_reg.h
index 04e8fb7..f18cdfc 100644
--- a/drivers/gpu/drm/nouveau/nouveau_reg.h
+++ b/drivers/gpu/drm/nouveau/nouveau_reg.h
@@ -639,9 +639,9 @@
# define NV50_PCONNECTOR_I2C_PORT_4 0x0000e240
# define NV50_PCONNECTOR_I2C_PORT_5 0x0000e258
-#define NV50_AUXCH_DATA_OUT(i,n) ((n) * 4 + (i) * 0x50 +
0x0000e4c0)
+#define NV50_AUXCH_DATA_OUT(i, n) ((n) * 4 + (i) * 0x50 +
0x0000e4c0)
#define NV50_AUXCH_DATA_OUT__SIZE 4
-#define NV50_AUXCH_DATA_IN(i,n) ((n) * 4 + (i) * 0x50 +
0x0000e4d0)
+#define NV50_AUXCH_DATA_IN(i, n) ((n) * 4 + (i) * 0x50 +
0x0000e4d0)
#define NV50_AUXCH_DATA_IN__SIZE 4
#define NV50_AUXCH_ADDR(i) ((i) * 0x50 +
0x0000e4e0)
#define NV50_AUXCH_CTRL(i) ((i) * 0x50 +
0x0000e4e4)
@@ -829,7 +829,7 @@
#define NV50_PDISPLAY_SOR_BACKLIGHT 0x0061c084
#define NV50_PDISPLAY_SOR_BACKLIGHT_ENABLE 0x80000000
#define NV50_PDISPLAY_SOR_BACKLIGHT_LEVEL 0x00000fff
-#define NV50_SOR_DP_CTRL(i,l) (0x0061c10c + (i) * 0x800 + (l) *
0x80)
+#define NV50_SOR_DP_CTRL(i, l) (0x0061c10c + (i) * 0x800 + (l) *
0x80)
#define NV50_SOR_DP_CTRL_ENABLED 0x00000001
#define NV50_SOR_DP_CTRL_ENHANCED_FRAME_ENABLED 0x00004000
#define NV50_SOR_DP_CTRL_LANE_MASK 0x001f0000
@@ -841,10 +841,10 @@
#define NV50_SOR_DP_CTRL_TRAINING_PATTERN_DISABLED 0x00000000
#define NV50_SOR_DP_CTRL_TRAINING_PATTERN_1 0x01000000
#define NV50_SOR_DP_CTRL_TRAINING_PATTERN_2 0x02000000
-#define NV50_SOR_DP_UNK118(i,l) (0x0061c118 + (i) * 0x800 + (l) *
0x80)
-#define NV50_SOR_DP_UNK120(i,l) (0x0061c120 + (i) * 0x800 + (l) *
0x80)
-#define NV50_SOR_DP_UNK128(i,l) (0x0061c128 + (i) * 0x800 + (l) *
0x80)
-#define NV50_SOR_DP_UNK130(i,l) (0x0061c130 + (i) * 0x800 + (l) *
0x80)
+#define NV50_SOR_DP_UNK118(i, l) (0x0061c118 + (i) * 0x800 + (l) *
0x80)
+#define NV50_SOR_DP_UNK120(i, l) (0x0061c120 + (i) * 0x800 + (l) *
0x80)
+#define NV50_SOR_DP_UNK128(i, l) (0x0061c128 + (i) * 0x800 + (l) *
0x80)
+#define NV50_SOR_DP_UNK130(i, l) (0x0061c130 + (i) * 0x800 + (l) *
0x80)
#define NV50_PDISPLAY_USER(i) ((i) * 0x1000 +
0x00640000)
#define NV50_PDISPLAY_USER_PUT(i) ((i) * 0x1000 +
0x00640000)
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c
b/drivers/gpu/drm/nouveau/nv50_graph.c
index 614177c..80130e6 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -662,7 +662,7 @@ nv50_pgraph_mp_trap(struct drm_device *dev, int tpid, int
display)
nv_rd32(dev, addr + 0x20);
pc = nv_rd32(dev, addr + 0x24);
oplow = nv_rd32(dev, addr + 0x70);
- ophigh= nv_rd32(dev, addr + 0x74);
+ ophigh = nv_rd32(dev, addr + 0x74);
NV_INFO(dev, "PGRAPH_TRAP_MP_EXEC - "
"TP %d MP %d: ", tpid, i);
nouveau_enum_print(nv50_mp_exec_error_names, status);
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.h
b/drivers/gpu/drm/nouveau/nvc0_graph.h
index 93c8777..d32b385 100644
--- a/drivers/gpu/drm/nouveau/nvc0_graph.h
+++ b/drivers/gpu/drm/nouveau/nvc0_graph.h
@@ -28,11 +28,11 @@
#define GPC_MAX 4
#define TP_MAX 32
-#define ROP_BCAST(r) (0x408800 + (r))
-#define ROP_UNIT(u,r) (0x410000 + (u) * 0x400 + (r))
-#define GPC_BCAST(r) (0x418000 + (r))
-#define GPC_UNIT(t,r) (0x500000 + (t) * 0x8000 + (r))
-#define TP_UNIT(t,m,r) (0x504000 + (t) * 0x8000 + (m) * 0x800 + (r))
+#define ROP_BCAST(r) (0x408800 + (r))
+#define ROP_UNIT(u, r) (0x410000 + (u) * 0x400 + (r))
+#define GPC_BCAST(r) (0x418000 + (r))
+#define GPC_UNIT(t, r) (0x500000 + (t) * 0x8000 + (r))
+#define TP_UNIT(t, m, r) (0x504000 + (t) * 0x8000 + (m) * 0x800 + (r))
struct nvc0_graph_priv {
u8 gpc_nr;
--
1.7.1
Francisco Jerez
2011-Mar-24 18:54 UTC
[Nouveau] [PATCH 1/5] nouveau: Fix checkpatch.pl error messages
Emil Velikov <emil.l.velikov at gmail.com> writes:> Fix the following message > 'ERROR: trailing statements should be on next line' > > Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com> > --- > drivers/gpu/drm/nouveau/nouveau_display.c | 20 +++++++-- > drivers/gpu/drm/nouveau/nouveau_mem.c | 12 ++++-- > drivers/gpu/drm/nouveau/nouveau_object.c | 8 +++- > drivers/gpu/drm/nouveau/nv50_display.c | 64 +++++++++++++++++++++------- > drivers/gpu/drm/nouveau/nv50_fb.c | 9 +++- > drivers/gpu/drm/nouveau/nv50_grctx.c | 3 +- > drivers/gpu/drm/nouveau/nvc0_grctx.c | 4 +- > 7 files changed, 88 insertions(+), 32 deletions(-) > > diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c > index 764c15d..2dca746 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_display.c > +++ b/drivers/gpu/drm/nouveau/nouveau_display.c > @@ -91,12 +91,22 @@ nouveau_framebuffer_init(struct drm_device *dev, > nv_fb->r_dma = NvEvoVRAM_LP; > > switch (fb->depth) { > - case 8: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; break; > - case 15: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; break; > - case 16: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; break; > + case 8: > + nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; > + break; > + case 15: > + nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; > + break; > + case 16: > + nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; > + break; > case 24: > - case 32: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; break; > - case 30: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; break; > + case 32: > + nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; > + break; > + case 30: > + nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; > + break; > default: > NV_ERROR(dev, "unknown depth %d\n", fb->depth); > return -EINVAL; > diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c > index 8af07c4..12f511e 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_mem.c > +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c > @@ -432,10 +432,14 @@ nouveau_mem_vram_init(struct drm_device *dev) > u32 rsvd; > > /* estimate grctx size, the magics come from nv40_grctx.c */ > - if (dev_priv->chipset == 0x40) rsvd = 0x6aa0 * vs; > - else if (dev_priv->chipset < 0x43) rsvd = 0x4f00 * vs; > - else if (nv44_graph_class(dev)) rsvd = 0x4980 * vs; > - else rsvd = 0x4a40 * vs; > + if (dev_priv->chipset == 0x40) > + rsvd = 0x6aa0 * vs; > + else if (dev_priv->chipset < 0x43) > + rsvd = 0x4f00 * vs; > + else if (nv44_graph_class(dev)) > + rsvd = 0x4980 * vs; > + else > + rsvd = 0x4a40 * vs; > rsvd += 16 * 1024; > rsvd *= dev_priv->engine.fifo.channels; > > diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c > index 823800d..a89256e 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_object.c > +++ b/drivers/gpu/drm/nouveau/nouveau_object.c > @@ -416,9 +416,13 @@ nv50_gpuobj_dma_init(struct nouveau_gpuobj *obj, u32 offset, int class, > flags0 |= 0x00100000; > > switch (access) { > - case NV_MEM_ACCESS_RO: flags0 |= 0x00040000; break; > + case NV_MEM_ACCESS_RO: > + flags0 |= 0x00040000; > + break; > case NV_MEM_ACCESS_RW: > - case NV_MEM_ACCESS_WO: flags0 |= 0x00080000; break; > + case NV_MEM_ACCESS_WO: > + flags0 |= 0x00080000; > + break; > default: > break; > } > diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c > index 75a376c..031116c 100644 > --- a/drivers/gpu/drm/nouveau/nv50_display.c > +++ b/drivers/gpu/drm/nouveau/nv50_display.c > @@ -629,8 +629,12 @@ nv50_display_unk10_handler(struct drm_device *dev) > continue; > > switch ((mc & 0x00000f00) >> 8) { > - case 0: type = OUTPUT_ANALOG; break; > - case 1: type = OUTPUT_TV; break; > + case 0: > + type = OUTPUT_ANALOG; > + break; > + case 1: > + type = OUTPUT_TV; > + break; > default: > NV_ERROR(dev, "invalid mc, DAC-%d: 0x%08x\n", i, mc); > goto ack; > @@ -652,12 +656,24 @@ nv50_display_unk10_handler(struct drm_device *dev) > continue; > > switch ((mc & 0x00000f00) >> 8) { > - case 0: type = OUTPUT_LVDS; break; > - case 1: type = OUTPUT_TMDS; break; > - case 2: type = OUTPUT_TMDS; break; > - case 5: type = OUTPUT_TMDS; break; > - case 8: type = OUTPUT_DP; break; > - case 9: type = OUTPUT_DP; break; > + case 0: > + type = OUTPUT_LVDS; > + break; > + case 1: > + type = OUTPUT_TMDS; > + break; > + case 2: > + type = OUTPUT_TMDS; > + break; > + case 5: > + type = OUTPUT_TMDS; > + break; > + case 8: > + type = OUTPUT_DP; > + break; > + case 9: > + type = OUTPUT_DP; > + break; > default: > NV_ERROR(dev, "invalid mc, SOR-%d: 0x%08x\n", i, mc); > goto ack; > @@ -761,8 +777,12 @@ nv50_display_unk20_handler(struct drm_device *dev) > continue; > > switch ((mc & 0x00000f00) >> 8) { > - case 0: type = OUTPUT_ANALOG; break; > - case 1: type = OUTPUT_TV; break; > + case 0: > + type = OUTPUT_ANALOG; > + break; > + case 1: > + type = OUTPUT_TV; > + break; > default: > NV_ERROR(dev, "invalid mc, DAC-%d: 0x%08x\n", i, mc); > goto ack; > @@ -784,12 +804,24 @@ nv50_display_unk20_handler(struct drm_device *dev) > continue; > > switch ((mc & 0x00000f00) >> 8) { > - case 0: type = OUTPUT_LVDS; break; > - case 1: type = OUTPUT_TMDS; break; > - case 2: type = OUTPUT_TMDS; break; > - case 5: type = OUTPUT_TMDS; break; > - case 8: type = OUTPUT_DP; break; > - case 9: type = OUTPUT_DP; break; > + case 0: > + type = OUTPUT_LVDS; > + break; > + case 1: > + type = OUTPUT_TMDS; > + break; > + case 2: > + type = OUTPUT_TMDS; > + break; > + case 5: > + type = OUTPUT_TMDS; > + break; > + case 8: > + type = OUTPUT_DP; > + break; > + case 9: > + type = OUTPUT_DP; > + break; > default: > NV_ERROR(dev, "invalid mc, SOR-%d: 0x%08x\n", i, mc); > goto ack; > diff --git a/drivers/gpu/drm/nouveau/nv50_fb.c b/drivers/gpu/drm/nouveau/nv50_fb.c > index ddebd71..d6880e4 100644 > --- a/drivers/gpu/drm/nouveau/nv50_fb.c > +++ b/drivers/gpu/drm/nouveau/nv50_fb.c > @@ -277,9 +277,12 @@ nv50_fb_vm_trap(struct drm_device *dev, int display) > else > printk("%02x/", st2); > > - if (cl && cl->data) cl = nouveau_enum_find(cl->data, st3); > - else if (en && en->data) cl = nouveau_enum_find(en->data, st3); > - else cl = NULL; > + if (cl && cl->data) > + cl = nouveau_enum_find(cl->data, st3); > + else if (en && en->data) > + cl = nouveau_enum_find(en->data, st3); > + else > + cl = NULL; > if (cl) > printk("%s", cl->name); > else > diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c b/drivers/gpu/drm/nouveau/nv50_grctx.c > index 336aab2..6a4290a 100644 > --- a/drivers/gpu/drm/nouveau/nv50_grctx.c > +++ b/drivers/gpu/drm/nouveau/nv50_grctx.c > @@ -572,7 +572,8 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) > > /* per-MP state */ > for (j = 0; j < (dev_priv->chipset < 0xa0 ? 2 : 4); j++) { > - if (!(units & (1 << (j+24)))) continue; > + if (!(units & (1 << (j+24)))) > + continue; > if (dev_priv->chipset < 0xa0) > offset = base + 0x200 + (j<<7); > else > diff --git a/drivers/gpu/drm/nouveau/nvc0_grctx.c b/drivers/gpu/drm/nouveau/nvc0_grctx.c > index f880ff7..7aa0cbf 100644 > --- a/drivers/gpu/drm/nouveau/nvc0_grctx.c > +++ b/drivers/gpu/drm/nouveau/nvc0_grctx.c > @@ -32,7 +32,9 @@ nv_icmd(struct drm_device *dev, u32 icmd, u32 data) > { > nv_wr32(dev, 0x400204, data); > nv_wr32(dev, 0x400200, icmd); > - while (nv_rd32(dev, 0x400700) & 2) {} > + while (nv_rd32(dev, 0x400700) & 2) { > + /* by design */ > + } > } > > static voidThanks, I've pushed patches 2 through 5, but not this one, Ben's too attached to these "compressed" conditional blocks :) -------------- next part -------------- A non-text attachment was scrubbed... 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