Constable, Scott D via llvm-dev
2022-Jan-22 21:23 UTC
[llvm-dev] [RDF] Question about function argument registers on X86
Hi, Given the function: long simpleExample(long x) { return x; } RDF produces the following data-flow graph: DFG dump:[ f1: Function: simpleExample b2: --- %bb.0 --- preds(0): succs(0): p8: phi [+d9<DIH:0000000000000001>(,,u15"):] p10: phi [+d11<DIL:0000000000000001>(,,u14"):] p12: phi [+d13<HDI:0000000000000001>(,,u5"):] s3: COPY [d4<RAX>(,,u7):, u5"<RDI>(+d13):, u14"<RDI>(+d11):, u15"<RDI>(+d9):] s6: RET [u7<RAX>!(d4):] ] Why is the argument in RDI split into three lanes that do not fully span RDI? It would seem more natural to just have a single phi for RDI. I think the RDF code responsible for this behavior is located here: https://github.com/llvm/llvm-project/blob/55d887b833646baeea0e3371fd2cbbd7550a8d4d/llvm/lib/CodeGen/RDFGraph.cpp#L903, but I admit I do not fully understand what is going on. Thanks in advance, Scott Constable -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20220122/3cd54a7c/attachment.html>
Krzysztof Parzyszek via llvm-dev
2022-Jan-24 19:47 UTC
[llvm-dev] [RDF] Question about function argument registers on X86
Hi Scott, It used to be the case early on that we'd create an entry for the register as it was specified, but I've been running into all sorts of complications when calculating liveness. Specifically, when defs/uses of "large" registers were intermingled with defs/uses of their sub-registers, various "interesting" scenarios showed up. They had to do with representing unions/intersections of registers in terms of actual registers[1]---that was the reason for switching to tracking register units instead (see RegisterAggr class). The consequence of that is that the graph looks more cluttered, but things are easier to express accurately. [1] This was before lane masks became popular. Say we have AX = def AH = clobber Here AX is still "defined" since some part of it is defined. Now, if we know that AX is "defined" then what can we say about it after executing "AL = clobber"? Turns out that this is difficult to answer, because we'd have to know the history of how AX was modified, which isn't always analyzed in full: (RDF stop def traversal at a PHI node). -- Krzysztof Parzyszek kparzysz at quicinc.com<mailto:kparzysz at quicinc.com> AI tools development From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Constable, Scott D via llvm-dev Sent: Saturday, January 22, 2022 3:24 PM To: llvm-dev at lists.llvm.org Subject: [llvm-dev] [RDF] Question about function argument registers on X86 WARNING: This email originated from outside of Qualcomm. Please be wary of any links or attachments, and do not enable macros. Hi, Given the function: long simpleExample(long x) { return x; } RDF produces the following data-flow graph: DFG dump:[ f1: Function: simpleExample b2: --- %bb.0 --- preds(0): succs(0): p8: phi [+d9<DIH:0000000000000001>(,,u15"):] p10: phi [+d11<DIL:0000000000000001>(,,u14"):] p12: phi [+d13<HDI:0000000000000001>(,,u5"):] s3: COPY [d4<RAX>(,,u7):, u5"<RDI>(+d13):, u14"<RDI>(+d11):, u15"<RDI>(+d9):] s6: RET [u7<RAX>!(d4):] ] Why is the argument in RDI split into three lanes that do not fully span RDI? It would seem more natural to just have a single phi for RDI. I think the RDF code responsible for this behavior is located here: https://github.com/llvm/llvm-project/blob/55d887b833646baeea0e3371fd2cbbd7550a8d4d/llvm/lib/CodeGen/RDFGraph.cpp#L903, but I admit I do not fully understand what is going on. Thanks in advance, Scott Constable -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20220124/4d5571f1/attachment.html>