llvm dev - Aug 2021 - [MSP430] Plans for MSP430 improvements

Hi,

I thought I would notify the LLVM community about some improvements to
MSP430 support in LLVM/Clang that I'm planning to make.

MCU support
============  - Update MCU data to the latest version
    + Currently only 161 MCUs are supported, but the latest version of
      TI device data describes 609 MCUs.
  - Store the CPU version of each MCU
    + Currently only the hardware multiply version of each MCU is
      stored; knowledge of the CPU supported by each MCU is required for
      future updates.

Support MSP430X code generation (small memory model only)
==========================================================  - Support the
-mcpu=msp430x option in Clang
    + This option is accepted by Clang, but doesn't do anything.
      Plumbing is required so it enables the MSP430X feature in LLVM,
      and passes the correct multilibs to the linker.
  - Implement extended shift instructions
    + MSP430X shift instructions such as RRAM and RRAX can shift by
      more than one bit position in a single instruction.
    + Currently, multiple shift instructions need to be emitted, each
      shifting by one bit position.
  - Implement extended PUSH/POP instructions
    + PUSHM/POPM can push and pop multiple registers with a single
      instruction.
    + Currently, multiple PUSH/POP instructions need to be emitted, each
      pushing or popping one register.
  - Implement the RPT flag in the extension word
    + The RPT flag describes how many times an instruction should be
      repeated. Up to 16 repeats are supported, and the repeat count can
      be hard-coded into the extension word, or stored in a register
      described by the extension word.
    + This is mainly used for encoding shifts by amounts not supported
      by the more compact R**M instructions.

Check correctness of code generation using the GCC testsuite
=============================================================  - I've used
the Embecosm "gcc-for-llvm-testing"[1] repository to run a
    subset of GCC's execution tests on MSP430, using the Binutils/GDB
    simulator. So far it doesn't seem like anything is critically
    broken, but I need to do a full run of the suite and analyze the
    results.

In addition to above, I've also implemented ELF object attributes,
currently awaiting review here: <https://reviews.llvm.org/D107969>

Thanks,
Jozef

[1] <https://github.com/embecosm/gcc-for-llvm-testing>

Thanks, Josef!

Contributions to MSP430 are much appreciated and I will be happy to
review them (was on vacations recently and taming the backlog of
emails now).

On Sun, Aug 15, 2021 at 7:39 PM Jozef Lawrynowicz via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>
> Hi,
>
> I thought I would notify the LLVM community about some improvements to
> MSP430 support in LLVM/Clang that I'm planning to make.
>
> MCU support
> ============>   - Update MCU data to the latest version
>     + Currently only 161 MCUs are supported, but the latest version of
>       TI device data describes 609 MCUs.
>   - Store the CPU version of each MCU
>     + Currently only the hardware multiply version of each MCU is
>       stored; knowledge of the CPU supported by each MCU is required for
>       future updates.
>
> Support MSP430X code generation (small memory model only)
> ==========================================================>   - Support
the -mcpu=msp430x option in Clang
>     + This option is accepted by Clang, but doesn't do anything.
>       Plumbing is required so it enables the MSP430X feature in LLVM,
>       and passes the correct multilibs to the linker.
>   - Implement extended shift instructions
>     + MSP430X shift instructions such as RRAM and RRAX can shift by
>       more than one bit position in a single instruction.
>     + Currently, multiple shift instructions need to be emitted, each
>       shifting by one bit position.
>   - Implement extended PUSH/POP instructions
>     + PUSHM/POPM can push and pop multiple registers with a single
>       instruction.
>     + Currently, multiple PUSH/POP instructions need to be emitted, each
>       pushing or popping one register.
>   - Implement the RPT flag in the extension word
>     + The RPT flag describes how many times an instruction should be
>       repeated. Up to 16 repeats are supported, and the repeat count can
>       be hard-coded into the extension word, or stored in a register
>       described by the extension word.
>     + This is mainly used for encoding shifts by amounts not supported
>       by the more compact R**M instructions.
>
> Check correctness of code generation using the GCC testsuite
> =============================================================>   -
I've used the Embecosm "gcc-for-llvm-testing"[1] repository to run
a
>     subset of GCC's execution tests on MSP430, using the Binutils/GDB
>     simulator. So far it doesn't seem like anything is critically
>     broken, but I need to do a full run of the suite and analyze the
>     results.
>
> In addition to above, I've also implemented ELF object attributes,
> currently awaiting review here: <https://reviews.llvm.org/D107969>
>
> Thanks,
> Jozef
>
> [1] <https://github.com/embecosm/gcc-for-llvm-testing>
>
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
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-- 
With best regards, Anton Korobeynikov
Department of Statistical Modelling, Saint Petersburg State University