Krzysztof Parzyszek via llvm-dev
2021-Jun-23 19:23 UTC
[llvm-dev] Address of instruction in codegen
Check if MachineInstr::[sg]etPreInstrSymbol do what you need. -- Krzysztof Parzyszek kparzysz at quicinc.com AI tools development -----Original Message----- From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of David Greene via llvm-dev Sent: Wednesday, June 23, 2021 2:18 PM To: llvm-dev <llvm-dev at lists.llvm.org> Subject: [EXT] [llvm-dev] Address of instruction in codegen Hi everyone, I have a need to generate the address of an instruction during codegen. Is there any way to do this? I was hoping that I could split the basic block very late and then use an MO_BlockAddress MachineOperand, but apparently generating such a thing requires a BlockAddress object, which in turn would force splitting the basic block very early, at the IR level. I don't actually need the address until just before regalloc. In fact, generating a BlockAddress early would probably result in a dead Instruction as I wouldn't have anything to actually connect it to as a user. I suppose I could use a dummy target intrinsic as a user but that seems very hacky. I also thought about doing this extremely late and encoding the address generation during binary streaming in the MC layer but that also seems very hacky and difficult to maintain, requiring various pseudo-instructions to live until asm or object writing. Any brilliant ideas out there? -David _______________________________________________ LLVM Developers mailing list llvm-dev at lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
Reid Kleckner via llvm-dev
2021-Jun-24 18:37 UTC
[llvm-dev] Address of instruction in codegen
On Wed, Jun 23, 2021 at 12:23 PM Krzysztof Parzyszek via llvm-dev < llvm-dev at lists.llvm.org> wrote:> Check if MachineInstr::[sg]etPreInstrSymbol do what you need. >I have generated enough awareness of this API that other people mention it now. Success. :) A word of caution: depending on where you are in codegen, there are late passes that can delete or duplicate MachineInstrs (tail duplication comes to mind). You need to be reasonably confident that the annotated instruction won't be affected by such passes, or you will get errors from the assembler about an undefined label or duplicate label definitions. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20210624/495b5ad0/attachment.html>
David Greene via llvm-dev
2021-Jul-08 02:40 UTC
[llvm-dev] Address of instruction in codegen
Reid Kleckner <rnk at google.com> writes:> A word of caution: depending on where you are in codegen, there are late > passes that can delete or duplicate MachineInstrs (tail duplication comes > to mind). You need to be reasonably confident that the annotated > instruction won't be affected by such passes, or you will get errors from > the assembler about an undefined label or duplicate label definitions.I actually ran into that. :) Would a patch to fix the tail merging issue be of interest? As composed now I have it not allowing merging where a pre- or post-symbol differs but I can also imagine enhancements to update uses of the symbol. -David