Francesco Bertolaccini via llvm-dev
2021-Jul-02 08:51 UTC
[llvm-dev] Instruction selection: multiple patterns for single instruction?
Hi everyone, I'm trying to add intrinsics for some already-existing instructions in the MIPS target. How can I make so that a single instruction is selected for multiple possible patterns? For example, class shift_rotate_imm<string opstr, Operand ImmOpnd, RegisterOperand RO, InstrItinClass itin, SDPatternOperator OpNode = null_frag, SDPatternOperator PF = null_frag> : InstSE<(outs RO:$rd), (ins RO:$rt, ImmOpnd:$shamt), !strconcat(opstr, "\t$rd, $rt, $shamt"), [(set RO:$rd, (OpNode RO:$rt, PF:$shamt))], itin, FrmR, opstr> { let TwoOperandAliasConstraint = "$rt = $rd"; } Is selected for the pattern (set RO:$rd, (OpNode RO:$rt, PF:$shamt)) How can I make so that the instructions instantiated from this class are also selected for (set RO:$rd, (int_mips_my_builtin RO:$rt, PF:$shamt)) ? Appending the new pattern to the existing list obviously won't work since that is used for (AFAIU) a sequence of operations. Thanks, Francesco