llvm dev - Jun 2021 - Saving VFP registers for arm interrupt functions

Hey everyone,

Currently, interrupt attributes on ARM do not save the VFP registers on Non-M
class CPUs: "If VFP operations are needed, that state must be saved
manually"
(https://clang.llvm.org/docs/AttributeReference.html#interrupt-arm). At TI,
based on customer feedback, we would like to allow users to change this
behavior.


Preliminary thoughts is to add a new `interrupt_save_ fp` attribute that will
change the behavior to save D0-D16, FPEXC, and FPSCR. From a codegen side, this
change can probably be implemented by manually adding some instructions in the
`ARMFrameLowering::spillCalleeSavedRegisters`, or similar to CMSE, add a
pseudo-instruction.

This email is to try and get feedback around:


  *   Design implementation, if anyone has thoughts on best ways to implement
this
  *   Existing functionality that is similar, (either in other architectures or
in ARM) that can be used to model this feature (CMSE is currently the closest
thing I have found)
  *   Upstreamability - if possible, what would this feature have to look like
to get upstreamed.

Thanks,

Jake Vossen
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