林政宗 via llvm-dev
2021-May-24 15:03 UTC
[llvm-dev] how to set BaseOpcode when using multiclass for relation model in td file
Hi, I am trying to relate normal instructions with predicate instructions. I have read the document How To Use Instruction Mappings — LLVM 12 documentation. If normal instruction and the corresponding instruction are related, they should have the same BaseOpcode. The document covers class/def only. It doesn't cover multiclass/defm. for example: class VFORM<...> {...} multiclass MFORM<...> { def _aa: VFORM<...>; def _bb: VFORM<...>; } defm MOV: MFORM<...>; defm P_MOV: MFORM<...>; P_MOV_aa and P_MOV_bb are the corresponding predicate instruction of MOV_aa and MOV_bb. when relating P_MOV_aa with MOV_aa and P_MOV_bb with MOV_bb, they should have the same BaseOpcode. I think the normal instruction definition name is the best option for BaseOpcode, such as "MOV_aa" and "MOV_bb". Could I get the instruction definition name automatically and assign it to BaseOpcode in td file? Or is there a convenint way to set BaseOpcode for normal/predicate instruction when using multiclass/defm? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20210524/3a9a91cf/attachment.html>
Björn Pettersson A via llvm-dev
2021-May-25 19:39 UTC
[llvm-dev] how to set BaseOpcode when using multiclass for relation model in td file
I think that you for example should be able to do something like this: multiclass MFORM<string BaseName, …> { let BaseOpcode = BaseName in { def BaseName#_aa : VFORM<…>; def BaseName#_bb : VFORM<…>; } } defm “” : MFORM<”MOV”, …>; defm “” : MFORM<”P_MOV”, …>; /Björn From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of ??? via llvm-dev Sent: den 24 maj 2021 17:03 To: llvm-dev at lists.llvm.org Subject: [llvm-dev] how to set BaseOpcode when using multiclass for relation model in td file Hi, I am trying to relate normal instructions with predicate instructions. I have read the document How To Use Instruction Mappings — LLVM 12 documentation<https://protect2.fireeye.com/v1/url?k=93a78a7d-cc3cb330-93a7cae6-86b568293eb5-73720be28813bde3&q=1&e=3e653e85-9f00-4403-9d18-ece444e45ae9&u=https%3A%2F%2Fllvm.org%2Fdocs%2FHowToUseInstrMappings.html>. If normal instruction and the corresponding instruction are related, they should have the same BaseOpcode. The document covers class/def only. It doesn't cover multiclass/defm. for example: class VFORM<...> {...} multiclass MFORM<...> { def _aa: VFORM<...>; def _bb: VFORM<...>; } defm MOV: MFORM<...>; defm P_MOV: MFORM<...>; P_MOV_aa and P_MOV_bb are the corresponding predicate instruction of MOV_aa and MOV_bb. when relating P_MOV_aa with MOV_aa and P_MOV_bb with MOV_bb, they should have the same BaseOpcode. I think the normal instruction definition name is the best option for BaseOpcode, such as "MOV_aa" and "MOV_bb". Could I get the instruction definition name automatically and assign it to BaseOpcode in td file? Or is there a convenint way to set BaseOpcode for normal/predicate instruction when using multiclass/defm? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20210525/1eb475f2/attachment.html>