Sjoerd Meijer via llvm-dev
2021-Mar-25 09:32 UTC
[llvm-dev] isHardwareLoopProfitable() called with empty assumption cache in hwloops pass
I can't imagine that being the intended behaviour. I don't think we have paid much attention to the assumption cache in the ARM implementation. Some parts of the hardware loop infrastructure were factored out from the initial PPC implementation, which I think explains it is there and used by PPC, but not in the ARM implementation. But perhaps Sam knows more. I have never looked into the AssumptionCache, but I assume there's way to retrigger and repopulate it (after CGP)? Just out of curiousity, can you perhaps tell more how you would like to persuade/force hardware loops with an assume? There are some options at the moment (but would apply to all loops in the compilation unit), don't think we e.g. looked into a pragma, so it sounds interesting. I guess this is a hint about the iteration count? Cheers, Sjoerd. ________________________________ From: Janek Van Oirschot <janekvo at graphcore.ai> Sent: 24 March 2021 17:27 To: llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org> Cc: Sam Parker <Sam.Parker at arm.com>; Sjoerd Meijer <Sjoerd.Meijer at arm.com>; David Green <David.Green at arm.com> Subject: isHardwareLoopProfitable() called with empty assumption cache in hwloops pass Hey all, It seems that when HardwareLoops calls the isHardwareLoopProfitable TTI hook, it never has a populated AssumptionCache. Some debugging revealed that HardwareLoops runs during the PreISel phase for ARM and PPC. However, the CodeGenPrepare pass runs before PreISel and removes all assumes meaning that the AssumptionCache in HardwareLoops will end up empty.>From what I gather (and let me know if I'm wrong), only PPC uses the AssumptionCache in isHardwareLoopProfitable but only to aid in some cost analysis. I was wondering whether it's intended behaviour to have an empty AssumptionCache during HardwareLoops? I ask because I was looking into using assumes to persuade HardwareLoops into emitting hardware intrinsics for our (downstream) target.Kind regards, Janek van Oirschot ** We have updated our privacy policy, which contains important information about how we collect and process your personal data. To read the policy, please click here<http://www.graphcore.ai/privacy> ** This email and its attachments are intended solely for the addressed recipients and may contain confidential or legally privileged information. If you are not the intended recipient you must not copy, distribute or disseminate this email in any way; to do so may be unlawful. Any personal data/special category personal data herein are processed in accordance with UK data protection legislation. All associated feasible security measures are in place. Further details are available from the Privacy Notice on the website and/or from the Company. Graphcore Limited (registered in England and Wales with registration number 10185006) is registered at 107 Cheapside, London, UK, EC2V 6DN. This message was scanned for viruses upon transmission. However Graphcore accepts no liability for any such transmission. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20210325/60c66cb6/attachment.html>
Sam Parker via llvm-dev
2021-Mar-25 09:44 UTC
[llvm-dev] isHardwareLoopProfitable() called with empty assumption cache in hwloops pass
Indeed, it's just there because the original PPC implementation used it. Looking back through the commits, I didn't move the pass into a different phase so either PPC has either never had a populated assumption cache or never noticed the change when it was cleared. As Sjoerd said, can we re-populate it? As long as it runs after LSR, I can't immediately think of anything that would affect the Arm implementation (famous last words!) if we moved the transform a bit earlier in the pipeline. Regards, Sam Sam Parker Compilation Tools Engineer | Arm . . . . . . . . . . . . . . . . . . . . . . . . . . . Arm.com ________________________________ From: Sjoerd Meijer <Sjoerd.Meijer at arm.com> Sent: 25 March 2021 09:32 To: Janek Van Oirschot <janekvo at graphcore.ai>; llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org> Cc: Sam Parker <Sam.Parker at arm.com>; David Green <David.Green at arm.com> Subject: Re: isHardwareLoopProfitable() called with empty assumption cache in hwloops pass I can't imagine that being the intended behaviour. I don't think we have paid much attention to the assumption cache in the ARM implementation. Some parts of the hardware loop infrastructure were factored out from the initial PPC implementation, which I think explains it is there and used by PPC, but not in the ARM implementation. But perhaps Sam knows more. I have never looked into the AssumptionCache, but I assume there's way to retrigger and repopulate it (after CGP)? Just out of curiousity, can you perhaps tell more how you would like to persuade/force hardware loops with an assume? There are some options at the moment (but would apply to all loops in the compilation unit), don't think we e.g. looked into a pragma, so it sounds interesting. I guess this is a hint about the iteration count? Cheers, Sjoerd. ________________________________ From: Janek Van Oirschot <janekvo at graphcore.ai> Sent: 24 March 2021 17:27 To: llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org> Cc: Sam Parker <Sam.Parker at arm.com>; Sjoerd Meijer <Sjoerd.Meijer at arm.com>; David Green <David.Green at arm.com> Subject: isHardwareLoopProfitable() called with empty assumption cache in hwloops pass Hey all, It seems that when HardwareLoops calls the isHardwareLoopProfitable TTI hook, it never has a populated AssumptionCache. Some debugging revealed that HardwareLoops runs during the PreISel phase for ARM and PPC. However, the CodeGenPrepare pass runs before PreISel and removes all assumes meaning that the AssumptionCache in HardwareLoops will end up empty.>From what I gather (and let me know if I'm wrong), only PPC uses the AssumptionCache in isHardwareLoopProfitable but only to aid in some cost analysis. I was wondering whether it's intended behaviour to have an empty AssumptionCache during HardwareLoops? I ask because I was looking into using assumes to persuade HardwareLoops into emitting hardware intrinsics for our (downstream) target.Kind regards, Janek van Oirschot ** We have updated our privacy policy, which contains important information about how we collect and process your personal data. To read the policy, please click here<http://www.graphcore.ai/privacy> ** This email and its attachments are intended solely for the addressed recipients and may contain confidential or legally privileged information. If you are not the intended recipient you must not copy, distribute or disseminate this email in any way; to do so may be unlawful. Any personal data/special category personal data herein are processed in accordance with UK data protection legislation. All associated feasible security measures are in place. Further details are available from the Privacy Notice on the website and/or from the Company. Graphcore Limited (registered in England and Wales with registration number 10185006) is registered at 107 Cheapside, London, UK, EC2V 6DN. This message was scanned for viruses upon transmission. However Graphcore accepts no liability for any such transmission. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20210325/1db8f315/attachment.html>