llvm dev - Mar 2021 - llvm-mca for in-order CPUs (was Re: LLVM Weekly - #375, March 8th 2021)

On Mon, 8 Mar 2021 at 18:33, LLVM Weekly <list at llvmweekly.org>
wrote:
> * The llvm-mca static performance analysis tool now support in-order CPUs
such
>   as the Arm Cortex-A55.
[d791695](https://reviews.llvm.org/rGd791695cb517).
Thanks for doing this! I am very interested in using it for the AMDGPU
target. Have you given any thought to targets with
MicroOpBufferSize=1? I understand that these are also "in order". I
found that I could get some tests running with these changes:
https://reviews.llvm.org/differential/diff/329308/

But I am really shooting in the dark here. I don't have a good
understanding of the difference between MicroOpBufferSize=0 and 1, and
I am not even sure which setting is really best for AMDGPU.

Thanks,
Jay.

Hi Jay,

Jay Foad writes:
> On Mon, 8 Mar 2021 at 18:33, LLVM Weekly <list at llvmweekly.org>
wrote:
>> * The llvm-mca static performance analysis tool now support in-order
CPUs such
>>   as the Arm Cortex-A55.
[d791695](https://reviews.llvm.org/rGd791695cb517).
>
> Thanks for doing this! I am very interested in using it for the AMDGPU
> target.
So far the feature was only tested for ARM in-order CPUs, so it will be
great if you can try it for the AMDGPU target!
> Have you given any thought to targets with MicroOpBufferSize=1?
> I understand that these are also "in order". I found that I could
get
> some tests running with these changes:
> https://reviews.llvm.org/differential/diff/329308/
>
> But I am really shooting in the dark here. I don't have a good
> understanding of the difference between MicroOpBufferSize=0 and 1, and
> I am not even sure which setting is really best for AMDGPU.
Frankly, I don't know what is the difference between MicroOpBufferSize=0
and 1. We should probably treat them the same for MCA, so your changes
look good.

-- 
Andrew