llvm dev - Jul 2020 - How to contribute to LLVM RISC-V Backend

Hi Sam,
    My name is Peng Wang (William is my English name), a member of rvv-llvm team
from PLCT lab, Chinese Academy of Sciences. We are supporting riscv-v-spec 0.9
and vector intrinsic functions nowadays. Currently we have implemented vector
builtin functions and vector data types in clang, and converted these builtin
functions into LLVM intrinsic function calls. In the back-end code generation
stage. we converted these intrinsic function calls into specific vector
instructions, and finally automatically converting C/C++ programs into vector
instructions through optimization techniques. (the repository should be found at
[1]).
    We PLCT lab have a strong motivation for contributing our work to upstream.
I have noticed that currently there are many ongoing work around RISC-V V spec
implementations in the official repo. Some patches are under review and seems
will be landed in few days. Would you please give me some suggestions for where
to start to get involved in the RISC-V Vector extension development?

[1] https://github.com/isrc-cas/rvv-llvm

Thank you
Best Regards
William

On Fri, 10 Jul 2020 at 09:38, 王鹏 via llvm-dev <llvm-dev at lists.llvm.org>
wrote:
>
> Hi Sam,
>     My name is Peng Wang (William is my English name), a member of rvv-llvm
team from PLCT lab, Chinese Academy of Sciences. We are supporting riscv-v-spec
0.9 and vector intrinsic functions nowadays. Currently we have implemented
vector builtin functions and vector data types in clang, and converted these
builtin functions into LLVM intrinsic function calls. In the back-end code
generation stage. we converted these intrinsic function calls into specific
vector instructions, and finally automatically converting C/C++ programs into
vector instructions through optimization techniques. (the repository should be
found at [1]).
>     We PLCT lab have a strong motivation for contributing our work to
upstream. I have noticed that currently there are many ongoing work around
RISC-V V spec implementations in the official repo. Some patches are under
review and seems will be landed in few days. Would you please give me some
suggestions for where to start to get involved in the RISC-V Vector extension
development?
Hi William,

Sam is out-of-office today so I hope you don't mind me stepping in.
I've CCed in a number of active contributors to RISC-V Vector support
in LLVM, who may have thoughts on the best way to collaborate going
forwards. Roger mentioned in the RISC-V LLVM call yesterday
(http://lists.llvm.org/pipermail/llvm-dev/2020-July/143238.html) that
work is underway for an RFC on codegen related challenges for the
vector extension.

Best,

Alex