I'm looking for the method to print out the Data Flow Graph(DFG) which has edges labeled with latency. Is it possible to generate it from LLVM IR? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20191010/150d5c57/attachment.html>
Alexey Zhikhartsev via llvm-dev
2019-Oct-11 15:34 UTC
[llvm-dev] Data flow graph with latency
Instruction latency is target-dependent, so midend IR does not have it. Latencies can be found in instruction scheduling DAGs, although be aware that they are local (I.e., per basic block). Best, Alexey On Thu., Oct. 10, 2019, 12:27 a.m. 이수연 via llvm-dev, < llvm-dev at lists.llvm.org> wrote:> I'm looking for the method to print out the Data Flow Graph(DFG) which has > edges labeled with latency. > Is it possible to generate it from LLVM IR? > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20191011/c1c8a37c/attachment-0001.html>